Assignee
TEXAS INSTR ACER INC
TW·134 granted patents·4,371 citations·filing 1996–1999
Top patents by PatentIndex Score
134 records- 0199US5897348ALow mask count self-aligned silicided CMOS transistors with a high electrostatic discharge resistanceTEXAS INSTR ACER INC·Filed 1998·Granted Apr 27, 1999·378 cites·17 claims
- 0295US6096611AMethod to fabricate dual threshold CMOS circuitsTEXAS INSTR ACER INC·Filed 1998·Granted Aug 1, 2000·144 cites·7 claims
- 0395US6001695AMethod to form ultra-short channel MOSFET with a gate-side airgap structureTEXAS INSTR ACER INC·Filed 1998·Granted Dec 14, 1999·140 cites·27 claims
- 0494US6137152APlanarized deep-shallow trench isolation for CMOS/bipolar devicesTEXAS INSTR ACER INC·Filed 1998·Granted Oct 24, 2000·168 cites·3 claims
- 0594US5994747AMOSFETs with recessed self-aligned silicide gradual S/D junctionTEXAS INSTR ACER INC·Filed 1998·Granted Nov 30, 1999·132 cites·9 claims
- 0692US6136636AMethod of manufacturing deep sub-micron CMOS transistorsTEXAS INSTR ACER INC·Filed 1999·Granted Oct 24, 2000·103 cites·19 claims
- 0791US6214696B1Method of fabricating deep-shallow trench isolationTEXAS INSTR ACER INC·Filed 1999·Granted Apr 10, 2001·120 cites·12 claims
- 0891US5989950AReduced mask CMOS salicided processTEXAS INSTR ACER INC·Filed 1998·Granted Nov 23, 1999·94 cites·27 claims
- 0989US6114201AMethod of manufacturing a multiple fin-shaped capacitor for high density DRAMsTEXAS INSTR ACER INC·Filed 1998·Granted Sep 5, 2000·81 cites·20 claims
- 1089US5869374AMethod to form mosfet with an inverse T-shaped air-gap gate structureTEXAS INSTR ACER INC·Filed 1998·Granted Feb 9, 1999·85 cites·16 claims
- 1188US5902125AMethod to form stacked-Si gate pMOSFETs with elevated and extended S/D junctionTEXAS INSTR ACER INC·Filed 1997·Granted May 11, 1999·77 cites·23 claims
- 1288US5880508AMOSFET with a high permitivity gate dielectricTEXAS INSTR ACER INC·Filed 1998·Granted Mar 9, 1999·78 cites·10 claims
- 1387US6294416B1Method of fabricating CMOS transistors with self-aligned planarization twin-well by using fewer mask countsTEXAS INSTR ACER INC·Filed 1999·Granted Sep 25, 2001·67 cites·21 claims
- 1486US5915182AMOSFET with self-aligned silicidation and gate-side air-gap structureTEXAS INSTR ACER INC·Filed 1997·Granted Jun 22, 1999·81 cites·21 claims
- 1585US6165854AMethod to form shallow trench isolation with an oxynitride buffer layerTEXAS INSTR ACER INC·Filed 1998·Granted Dec 26, 2000·79 cites·20 claims
- 1684US6063706AMethod to simulataneously fabricate the self-aligned silicided devices and ESD protective devicesTEXAS INSTR ACER INC·Filed 1998·Granted May 16, 2000·57 cites·13 claims
- 1784US6060749AUltra-short channel elevated S/D MOSFETS formed on an ultra-thin SOI substrateTEXAS INSTR ACER INC·Filed 1998·Granted May 9, 2000·56 cites·4 claims
- 1884US5998247AProcess to fabricate the non-silicide region for electrostatic discharge protection circuitTEXAS INSTR ACER INC·Filed 1998·Granted Dec 7, 1999·58 cites·20 claims
- 1983US5972762AMethod of forming mosfets with recessed self-aligned silicide gradual S/D junctionTEXAS INSTR ACER INC·Filed 1998·Granted Oct 26, 1999·55 cites·27 claims
- 2083US5930617AMethod of forming deep sub-micron CMOS transistors with self-aligned silicided contact and extended S/D junctionTEXAS INSTR ACER INC·Filed 1998·Granted Jul 27, 1999·56 cites·18 claims
- 2182US6331456B1Fipos method of forming SOI CMOS structureTEXAS INSTR ACER INC·Filed 1998·Granted Dec 18, 2001·65 cites·20 claims
- 2282US6162681ADRAM cell with a fork-shaped capacitorTEXAS INSTR ACER INC·Filed 1999·Granted Dec 19, 2000·44 cites·12 claims
- 2382US5856226AMethod of making ultra-short channel MOSFET with self-aligned silicided contact and extended S/D junctionTEXAS INSTR ACER INC·Filed 1997·Granted Jan 5, 1999·54 cites·22 claims
- 2482US5834353AMethod of making deep sub-micron meter MOSFET with a high permitivity gate dielectricTEXAS INSTR ACER INC·Filed 1997·Granted Nov 10, 1998·55 cites·16 claims
- 2580US6180988B1Self-aligned silicided MOSFETS with a graded S/D junction and gate-side air-gap structureTEXAS INSTR ACER INC·Filed 1997·Granted Jan 30, 2001·58 cites·9 claims
- 2677US5989977AShallow trench isolation processTEXAS INSTR ACER INC·Filed 1998·Granted Nov 23, 1999·50 cites·20 claims
- 2777US5963799ABlanket well counter doping process for high speed/low power MOSFETsTEXAS INSTR ACER INC·Filed 1998·Granted Oct 5, 1999·40 cites·17 claims
- 2877US5877056AUltra-short channel recessed gate MOSFET with a buried contactTEXAS INSTR ACER INC·Filed 1998·Granted Mar 2, 1999·41 cites·36 claims
- 2976US6127712AMosfet with buried contact and air-gap gate structureTEXAS INSTR ACER INC·Filed 1999·Granted Oct 3, 2000·48 cites·14 claims
- 3076US5956584AMethod of making self-aligned silicide CMOS transistorsTEXAS INSTR ACER INC·Filed 1998·Granted Sep 21, 1999·39 cites·19 claims
- 3175US6083793AMethod to manufacture nonvolatile memories with a trench-pillar cell structure for high capacitive coupling ratioTEXAS INSTR ACER INC·Filed 1998·Granted Jul 4, 2000·36 cites·11 claims
- 3275US6064085ADRAM cell with a multiple fin-shaped structure capacitorTEXAS INSTR ACER INC·Filed 1998·Granted May 16, 2000·36 cites·14 claims
- 3375US5986305ASemiconductor device with an inverse-T gate lightly-doped drain structureTEXAS INSTR ACER INC·Filed 1998·Granted Nov 16, 1999·46 cites·10 claims
- 3474US6087234AMethod of forming a self-aligned silicide MOSFET with an extended ultra-shallow S/D junctionTEXAS INSTR ACER INC·Filed 1997·Granted Jul 11, 2000·45 cites·9 claims
- 3574US6074932AMethod for forming a stress-free shallow trench isolationTEXAS INSTR ACER INC·Filed 1998·Granted Jun 13, 2000·45 cites·22 claims
- 3674US6020230AProcess to fabricate planarized deep-shallow trench isolation having upper and lower portions with oxidized semiconductor trench fill in the upper portion and semiconductor trench fill in the lower portionTEXAS INSTR ACER INC·Filed 1998·Granted Feb 1, 2000·46 cites·19 claims
- 3773US6048765AMethod of forming high density buried bit line flash EEPROM memory cell with a shallow trench floating gateTEXAS INSTR ACER INC·Filed 1998·Granted Apr 11, 2000·30 cites·19 claims
- 3871US5888579AMethod and apparatus for preventing particle contamination in a process chamberTEXAS INSTR ACER INC·Filed 1996·Granted Mar 30, 1999·55 cites·18 claims
- 3970US6190977B1Method for forming MOSFET with an elevated source/drainTEXAS INSTR ACER INC·Filed 1999·Granted Feb 20, 2001·37 cites·19 claims
- 4070US5837588AMethod for forming a semiconductor device with an inverse-T gate lightly-doped drain structureTEXAS INSTR ACER INC·Filed 1998·Granted Nov 17, 1998·29 cites·14 claims
- 4169US6096614AMethod to fabricate deep sub-μm CMOSFETSTEXAS INSTR ACER INC·Filed 1998·Granted Aug 1, 2000·29 cites·10 claims
- 4269US6008079AMethod for forming a high density shallow trench contactless nonvolatile memoryTEXAS INSTR ACER INC·Filed 1998·Granted Dec 28, 1999·25 cites·21 claims
- 4369US5972761AMethod of making MOS transistors with a gate-side air-gap structure and an extension ultra-shallow S/D junctionTEXAS INSTR ACER INC·Filed 1997·Granted Oct 26, 1999·29 cites·22 claims
- 4469US5929493ACMOS transistors with self-aligned planarization twin-well by using fewer mask countsTEXAS INSTR ACER INC·Filed 1998·Granted Jul 27, 1999·28 cites·7 claims
- 4569US5913118AMethod of manufacturing trench DRAM cells with self-aligned field plateTEXAS INSTR ACER INC·Filed 1997·Granted Jun 15, 1999·22 cites·34 claims
- 4668US6100127ASelf-aligned silicided MOS transistor with a lightly doped drain ballast resistor for ESD protectionTEXAS INSTR ACER INC·Filed 1997·Granted Aug 8, 2000·28 cites·24 claims
- 4768US6057195AMethod of fabricating high density flat cell mask ROMTEXAS INSTR ACER INC·Filed 1998·Granted May 2, 2000·23 cites·22 claims
- 4868US6010934AMethod of making nanometer Si islands for single electron transistorsTEXAS INSTR ACER INC·Filed 1998·Granted Jan 4, 2000·33 cites·18 claims
- 4968US5877048A3-D CMOS transistors with high ESD reliabilityTEXAS INSTR ACER INC·Filed 1998·Granted Mar 2, 1999·27 cites·16 claims
- 5067US6153467AMethod of fabricating high density buried bit line flash EEPROM memory cell with a shallow trench floating gateTEXAS INSTR ACER INC·Filed 1999·Granted Nov 28, 2000·23 cites·14 claims
Showing the top 50 of 134 patent records by PatentIndex Score.
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