Assignee
SZEWERENKO LELAND
US·1 granted patent·2 pending applications·68 citations·filing 2006–2009
Top patents by PatentIndex Score
3 records- 0190US8341311B1System and method for reduced latency data transfers from flash memory to host by utilizing concurrent transfers into RAM buffer memory and FIFO host interfaceSZEWERENKO LELAND·Filed 2009·Granted Dec 25, 2012·68 cites·15 claims
- 0249US2009294946A1Package-Borne Selective Enablement StackingSZEWERENKO LELAND·Filed 2009·Application pending·0 cites
- 0340US2007158821A1Managed memory componentSZEWERENKO LELAND·Filed 2006·Application pending·0 cites
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