Assignee
STMICROELECTRONICS ROUSSET
FR97 patents
Top patents by PatentIndex Score
US9502110B1Nov 22, 2016
Modular cell for a memory array, the modular cell including a memory circuit and a read circuit
STMICROELECTRONICS ROUSSET20 citations93
US9853677B2Dec 26, 2017
Method for controlling the tuning to a communications frequency of an antenna connected to a component designed for contactless communication and corresponding system
STMICROELECTRONICS ROUSSET11 citations84
US9804631B2Oct 31, 2017
Method and device for generating an adjustable bandgap reference voltage
STMICROELECTRONICS ROUSSET5 citations84
US9787171B2Oct 10, 2017
Regulator for integrated circuit
STMICROELECTRONICS ROUSSET17 citations84
US9698765B1Jul 4, 2017
Dynamic sense amplifier with offset compensation
STMICROELECTRONICS ROUSSET7 citations84
US9678525B2Jun 13, 2017
Method for smoothing a current consumed by an integrated circuit and corresponding device
STMICROELECTRONICS ROUSSET6 citations84
US9544130B2Jan 10, 2017
Protection of a calculation against side-channel attacks
STMICROELECTRONICS ROUSSET5 citations84
US9406686B2Aug 2, 2016
Memory cell comprising non-self-aligned horizontal and vertical control gates
STMICROELECTRONICS ROUSSET5 citations84
US9792962B1Oct 17, 2017
Sense amplifier for memory device
STMICROELECTRONICS ROUSSET8 citations81
US10749576B2Aug 18, 2020
Evaluation of an average power consumption of an electronic circuit
STMICROELECTRONICS ROUSSET2 citations73
US9836070B2Dec 5, 2017
Regulator with low dropout voltage and improved stability
STMICROELECTRONICS ROUSSET3 citations73
US9825186B2Nov 21, 2017
Read performance of a non-volatile memory device, in particular a non-volatile memory device with buried selection transistor
STMICROELECTRONICS ROUSSET5 citations73
US9779815B2Oct 3, 2017
Method for writing in an EEPROM memory and corresponding device
STMICROELECTRONICS ROUSSET2 citations73
US9753886B2Sep 5, 2017
Communication on an I2C bus
STMICROELECTRONICS ROUSSET5 citations73
US9661448B2May 23, 2017
Method for managing information communication between a NFC controller and a secure element within an apparatus, and corresponding apparatus and NFC controller
STMICROELECTRONICS ROUSSET2 citations73
US9653470B2May 16, 2017
Individually read-accessible twin memory cells
STMICROELECTRONICS ROUSSET3 citations73
US9626614B2Apr 18, 2017
Protection of a radio frequency transmit-receive terminal against electromagnetic disturbances
STMICROELECTRONICS ROUSSET2 citations73
US9559297B2Jan 31, 2017
Vertical transistor for resistive memory
STMICROELECTRONICS ROUSSET2 citations73
US9484107B2Nov 1, 2016
Dual non-volatile memory cell comprising an erase transistor
STMICROELECTRONICS ROUSSET3 citations73
US9443598B2Sep 13, 2016
Method for programming a non-volatile memory cell comprising a shared select transistor gate
STMICROELECTRONICS ROUSSET5 citations73
US9431108B2Aug 30, 2016
Integrated structure comprising neighboring transistors
STMICROELECTRONICS ROUSSET3 citations73
US9876122B2Jan 23, 2018
Vertical memory cell with non-self-aligned floating drain-source implant
STMICROELECTRONICS ROUSSET3 citations72
US9793960B2Oct 17, 2017
NFC apparatus capable to perform a contactless tag reading function
STMICROELECTRONICS ROUSSET3 citations72
US9543311B2Jan 10, 2017
Vertical memory cell with non-self-aligned floating drain-source implant
STMICROELECTRONICS ROUSSET4 citations72
US10756628B2Aug 25, 2020
Switched mode power supply circuit
STMICROELECTRONICS ROUSSET5 citations71
US9761316B2Sep 12, 2017
Reconfigurable sense amplifier for a memory device
STMICROELECTRONICS ROUSSET4 citations70
US9716502B1Jul 25, 2017
Protection of an integrated circuit
STMICROELECTRONICS ROUSSET3 citations70
US9490415B2Nov 8, 2016
Integrated thermoelectric generator
STMICROELECTRONICS ROUSSET2 citations63
US9455034B1Sep 27, 2016
Method and system for managing a writing cycle of a data in a EEPROM memory cell
STMICROELECTRONICS ROUSSET2 citations63
US9874856B2Jan 23, 2018
EEPROM cell with charge loss
STMICROELECTRONICS ROUSSET0 citations52
US9801070B2Oct 24, 2017
Protection of a security element coupled to an NFC circuit
STMICROELECTRONICS ROUSSET0 citations52
US9780098B2Oct 3, 2017
Integrated structure comprising neighboring transistors
STMICROELECTRONICS ROUSSET0 citations52
US9780045B2Oct 3, 2017
Method for fabrication of an integrated circuit rendering a reverse engineering of the integrated circuit more difficult and corresponding integrated circuit
STMICROELECTRONICS ROUSSET0 citations52
US9767277B2Sep 19, 2017
Detection of fault injections in a random number generator
STMICROELECTRONICS ROUSSET0 citations52
US9754934B2Sep 5, 2017
Method of operating an integrated switchable capacitive device
STMICROELECTRONICS ROUSSET0 citations52
US9753665B2Sep 5, 2017
Non-volatile memory device having a memory size
STMICROELECTRONICS ROUSSET1 citations52
US9747053B1Aug 29, 2017
Apparatus and method for EEPROM select transistor breakdown voltage management
STMICROELECTRONICS ROUSSET0 citations52
US9728248B2Aug 8, 2017
Semiconductor structure and memory device including the structure
STMICROELECTRONICS ROUSSET1 citations52
US9729202B2Aug 8, 2017
Method of connecting one or more contactless components to a single antenna, and corresponding system
STMICROELECTRONICS ROUSSET0 citations52
US9721858B2Aug 1, 2017
Controllable integrated capacitive device
STMICROELECTRONICS ROUSSET1 citations52
US9714976B2Jul 25, 2017
Circuit and method for detecting a fault attack
STMICROELECTRONICS ROUSSET0 citations52
US9711230B2Jul 18, 2017
Method for writing into and reading a multi-levels EEPROM and corresponding memory device
STMICROELECTRONICS ROUSSET0 citations52
US9710650B2Jul 18, 2017
Protection of data stored in a volatile memory
STMICROELECTRONICS ROUSSET0 citations52
US9691866B2Jun 27, 2017
Memory cell having a vertical selection gate formed in an FDSOI substrate
STMICROELECTRONICS ROUSSET1 citations52
US9666484B2May 30, 2017
Integrated circuit protected from short circuits caused by silicide
STMICROELECTRONICS ROUSSET1 citations52
US9640493B2May 2, 2017
Method for fabrication of an integrated circuit rendering a reverse engineering of the integrated circuit more difficult and corresponding integrated circuit
STMICROELECTRONICS ROUSSET0 citations52
US9627068B2Apr 18, 2017
Twin memory cell interconnection structure
STMICROELECTRONICS ROUSSET0 citations52
US9613709B2Apr 4, 2017
Dual non-volatile memory cell comprising an erase transistor
STMICROELECTRONICS ROUSSET0 citations52
US9582664B2Feb 28, 2017
Detection of fault injections in a random number generator
STMICROELECTRONICS ROUSSET0 citations52
US9583193B2Feb 28, 2017
Compact memory device of the EEPROM type with a vertical select transistor
STMICROELECTRONICS ROUSSET1 citations52
Showing the top 50 of 97 patents by PatentIndex Score.