Assignee
SINHA DEBJIT
US·4 granted patents·27 citations·filing 2008–2009
Technology mixG06F4
Top patents by PatentIndex Score
4 records- 0184US8122404B2Performing a statistical timing abstraction for a hierarchical timing analysis of VLSI circuitsSINHA DEBJIT·Filed 2009·Granted Feb 21, 2012·15 cites·16 claims
- 0273US8141025B2Method of performing timing analysis on integrated circuit chips with consideration of process variationsSINHA DEBJIT·Filed 2009·Granted Mar 20, 2012·6 cites·17 claims
- 0370US8103997B2Method of employing slew dependent pin capacitances to capture interconnect parasitics during timing abstraction of VLSI circuitsSINHA DEBJIT·Filed 2009·Granted Jan 24, 2012·6 cites·21 claims
- 0450US8104005B2Method and apparatus for efficient incremental statistical timing analysis and optimizationSINHA DEBJIT·Filed 2008·Granted Jan 24, 2012·0 cites·24 claims
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