Assignee
MAZURE CARLOS
FR·13 granted patents·1 pending application·79 citations·filing 2010–2012
Top patents by PatentIndex Score
14 records- 0196US8305803B2DRAM memory cell having a vertical bipolar injectorMAZURE CARLOS·Filed 2010·Granted Nov 6, 2012·27 cites·20 claims
- 0289US8575697B2SRAM-type memory cellMAZURE CARLOS·Filed 2011·Granted Nov 5, 2013·13 cites·12 claims
- 0382US8664712B2Flash memory cell on SeOI having a second control gate buried under the insulating layerMAZURE CARLOS·Filed 2010·Granted Mar 4, 2014·6 cites·17 claims
- 0479US9490264B2Device having a contact between semiconductor regions through a buried insulating layer, and process for fabricating said deviceMAZURE CARLOS·Filed 2011·Granted Nov 8, 2016·5 cites·14 claims
- 0579US8223582B2Pseudo-inverter circuit on SeOIMAZURE CARLOS·Filed 2010·Granted Jul 17, 2012·6 cites·21 claims
- 0678US9035474B2Method for manufacturing a semiconductor substrateMAZURE CARLOS·Filed 2010·Granted May 19, 2015·4 cites·15 claims
- 0776US8508289B2Data-path cell on an SeOI substrate with a back control gate beneath the insulating layerMAZURE CARLOS·Filed 2011·Granted Aug 13, 2013·4 cites·22 claims
- 0876US8432216B2Data-path cell on an SeOI substrate with a back control gate beneath the insulating layerMAZURE CARLOS·Filed 2011·Granted Apr 30, 2013·4 cites·17 claims
- 0972US8325506B2Devices and methods for comparing data in a content-addressable memoryMAZURE CARLOS·Filed 2010·Granted Dec 4, 2012·3 cites·18 claims
- 1072US8304833B2Memory cell with a channel buried beneath a dielectric layerMAZURE CARLOS·Filed 2010·Granted Nov 6, 2012·3 cites·22 claims
- 1169US8654602B2Pseudo-inverter circuit on SeOIMAZURE CARLOS·Filed 2012·Granted Feb 18, 2014·3 cites·14 claims
- 1264US8987114B2Bonded semiconductor structures and method of forming sameMAZURE CARLOS·Filed 2011·Granted Mar 24, 2015·1 cites·15 claims
- 1340US9496877B2Pseudo-inverter circuit with multiple independent gate transistorsMAZURE CARLOS·Filed 2011·Granted Nov 15, 2016·0 cites·17 claims
- 1434US2011134690A1METHOD OF CONTROLLING A DRAM MEMORY CELL ON THE SeOI HAVING A SECOND CONTROL GATE BURIED UNDER THE INSULATING LAYERMAZURE CARLOS·Filed 2010·Application pending·0 cites
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Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →