Individual holder
LINK TECHNOLOGY G
US·12 granted patents·197 citations·filing 1998–2004
Individually held — no corporate assignee on record.
Top patents by PatentIndex Score
12 records- 0193US6765976B1Delay-locked loop for differential clock signalsLINK TECHNOLOGY G·Filed 2000·Granted Jul 20, 2004·76 cites·29 claims
- 0284US6275441B1Data input/output system for multiple data rate memory devicesLINK TECHNOLOGY G·Filed 2000·Granted Aug 14, 2001·37 cites·12 claims
- 0372US6606272B2Method and circuit for processing output data in pipelined circuitsLINK TECHNOLOGY G·Filed 2001·Granted Aug 12, 2003·20 cites·33 claims
- 0461US6031784AHierarchical decoding of a memory deviceLINK TECHNOLOGY G·Filed 1998·Granted Feb 29, 2000·19 cites·17 claims
- 0554US6529428B2Multi-bit parallel testing for memory devicesLINK TECHNOLOGY G·Filed 2001·Granted Mar 4, 2003·8 cites·20 claims
- 0653US6033945AMultiple equilibration circuits for a single bit lineLINK TECHNOLOGY G·Filed 1998·Granted Mar 7, 2000·11 cites·3 claims
- 0752US6166976AMultiple equilibration circuits for a single bit lineLINK TECHNOLOGY G·Filed 1999·Granted Dec 26, 2000·9 cites·18 claims
- 0848US5970020AControlling the set up of a memory addressLINK TECHNOLOGY G·Filed 1998·Granted Oct 19, 1999·11 cites·10 claims
- 0943US7027344B1High-speed semiconductor memory having internal refresh controlLINK TECHNOLOGY G·Filed 2004·Granted Apr 11, 2006·3 cites·14 claims
- 1038US6445641B1Memory device with time shared data linesLINK TECHNOLOGY G·Filed 2000·Granted Sep 3, 2002·1 cites·25 claims
- 1137US6501670B1High speed memory architecture and busingLINK TECHNOLOGY G·Filed 2000·Granted Dec 31, 2002·1 cites·27 claims
- 1231US6154386AMemory device having a wide data pathLINK TECHNOLOGY G·Filed 1998·Granted Nov 28, 2000·1 cites·10 claims
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Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →