Assignee
LEE TERRY R
US·9 granted patents·2 pending applications·36 citations·filing 2005–2012
Top patents by PatentIndex Score
11 records- 0196US8553470B2Apparatus and methods for a physical layout of simultaneously sub-accessible memory modulesLEE TERRY R·Filed 2011·Granted Oct 8, 2013·16 cites·22 claims
- 0280US8732383B2Reconfigurable memory module and methodLEE TERRY R·Filed 2012·Granted May 20, 2014·3 cites·4 claims
- 0380US8200884B2Reconfigurable memory module and methodLEE TERRY R·Filed 2011·Granted Jun 12, 2012·3 cites·4 claims
- 0475US8181092B2Dynamic synchronization of data capture on an optical or other high speed communications linkLEE TERRY R·Filed 2006·Granted May 15, 2012·4 cites·8 claims
- 0575US8127081B2Memory hub and access method having internal prefetch buffersLEE TERRY R·Filed 2008·Granted Feb 28, 2012·5 cites·20 claims
- 0671US8687446B2Semiconductor device with self refresh test modeLEE TERRY R·Filed 2008·Granted Apr 1, 2014·4 cites·17 claims
- 0753US8892974B2Dynamic synchronization of data capture on an optical or other high speed communications linkLEE TERRY R·Filed 2012·Granted Nov 18, 2014·0 cites·13 claims
- 0849US8295071B2Apparatus and methods for optically-coupled memory systemsLEE TERRY R·Filed 2011·Granted Oct 23, 2012·0 cites·43 claims
- 0949US2005235090A1High speed interface with looped busLEE TERRY R·Filed 2005·Application pending·0 cites
- 1048US8171181B2Memory module with configurable input/output portsLEE TERRY R·Filed 2008·Granted May 1, 2012·1 cites·19 claims
- 1141US2005265105A1Semiconductor device with self refresh test modeLEE TERRY R·Filed 2005·Application pending·0 cites
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Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →