Assignee
INAPAC TECHNOLOGY INC
US·30 granted patents·1,003 citations·filing 2000–2007
Top patents by PatentIndex Score
30 records- 0197US7265570B2Integrated circuit testing moduleINAPAC TECHNOLOGY INC·Filed 2005·Granted Sep 4, 2007·47 cites·27 claims
- 0296US7444575B2Architecture and method for testing of an integrated circuit deviceINAPAC TECHNOLOGY INC·Filed 2005·Granted Oct 28, 2008·38 cites·54 claims
- 0396US7313740B2Internally generating patterns for testing in an integrated circuit deviceINAPAC TECHNOLOGY INC·Filed 2005·Granted Dec 25, 2007·38 cites·32 claims
- 0496US6732304B1Chip testing within a multi-chip semiconductor packageINAPAC TECHNOLOGY INC·Filed 2000·Granted May 4, 2004·98 cites·34 claims
- 0595US7309999B2Electronic device having an interface supported testing modeINAPAC TECHNOLOGY INC·Filed 2005·Granted Dec 18, 2007·31 cites·38 claims
- 0694US7370256B2Integrated circuit testing module including data compressionINAPAC TECHNOLOGY INC·Filed 2006·Granted May 6, 2008·25 cites·24 claims
- 0794US7310000B2Integrated circuit testing module including command driverINAPAC TECHNOLOGY INC·Filed 2006·Granted Dec 18, 2007·27 cites·21 claims
- 0894US7307442B2Integrated circuit test array including test moduleINAPAC TECHNOLOGY INC·Filed 2006·Granted Dec 11, 2007·28 cites·22 claims
- 0994US7259582B2Bonding pads for testing of a semiconductor deviceINAPAC TECHNOLOGY INC·Filed 2005·Granted Aug 21, 2007·27 cites·4 claims
- 1094US7245141B2Shared bond pad for testing a memory within a packaged semiconductor deviceINAPAC TECHNOLOGY INC·Filed 2005·Granted Jul 17, 2007·31 cites·29 claims
- 1193US7365557B1Integrated circuit testing module including data generatorINAPAC TECHNOLOGY INC·Filed 2006·Granted Apr 29, 2008·31 cites·11 claims
- 1293US7269524B1Delay lock loop delay adjusting method and apparatusINAPAC TECHNOLOGY INC·Filed 2006·Granted Sep 11, 2007·25 cites·30 claims
- 1393US7061263B1Layout and use of bond pads and probe pads for testing of integrated circuits devicesINAPAC TECHNOLOGY INC·Filed 2001·Granted Jun 13, 2006·80 cites·16 claims
- 1493US6812726B1Entering test mode and accessing of a packaged semiconductor deviceINAPAC TECHNOLOGY INC·Filed 2002·Granted Nov 2, 2004·62 cites·24 claims
- 1592US7466603B2Memory accessing circuit systemINAPAC TECHNOLOGY INC·Filed 2007·Granted Dec 16, 2008·27 cites·25 claims
- 1691US7404117B2Component testing and recoveryINAPAC TECHNOLOGY INC·Filed 2005·Granted Jul 22, 2008·27 cites·12 claims
- 1790US6882171B2Bonding pads for testing of a semiconductor deviceINAPAC TECHNOLOGY INC·Filed 2003·Granted Apr 19, 2005·47 cites·28 claims
- 1889US7466160B2Shared memory bus architecture for system with processor and memory unitsINAPAC TECHNOLOGY INC·Filed 2006·Granted Dec 16, 2008·38 cites·14 claims
- 1989US7446551B1Integrated circuit testing module including address generatorINAPAC TECHNOLOGY INC·Filed 2006·Granted Nov 4, 2008·20 cites·9 claims
- 2088US7139945B2Chip testing within a multi-chip semiconductor packageINAPAC TECHNOLOGY INC·Filed 2004·Granted Nov 21, 2006·39 cites·25 claims
- 2187US7133798B1Monitoring signals between two integrated circuit devices within a single packageINAPAC TECHNOLOGY INC·Filed 2004·Granted Nov 7, 2006·46 cites·22 claims
- 2283US7006940B1Set up for a first integrated circuit chip to allow for testing of a co-packaged second integrated circuit chipINAPAC TECHNOLOGY INC·Filed 2003·Granted Feb 28, 2006·33 cites·16 claims
- 2383US6754866B1Testing of integrated circuit devicesINAPAC TECHNOLOGY INC·Filed 2001·Granted Jun 22, 2004·28 cites·18 claims
- 2481US7240254B2Multiple power levels for a chip within a multi-chip semiconductor packageINAPAC TECHNOLOGY INC·Filed 2004·Granted Jul 3, 2007·29 cites·24 claims
- 2577US7443188B2Electronic device having an interface supported testing modeINAPAC TECHNOLOGY INC·Filed 2007·Granted Oct 28, 2008·6 cites·25 claims
- 2677US7103815B2Testing of integrated circuit devicesINAPAC TECHNOLOGY INC·Filed 2004·Granted Sep 5, 2006·20 cites·22 claims
- 2776US6693449B1Circuit and method for determining the operating point of a semiconductor deviceINAPAC TECHNOLOGY INC·Filed 2001·Granted Feb 17, 2004·23 cites·20 claims
- 2872US6996652B1High-speed segmented data bus architectureINAPAC TECHNOLOGY INC·Filed 2002·Granted Feb 7, 2006·17 cites·6 claims
- 2960US6657914B1Configurable addressing for multiple chips in a packageINAPAC TECHNOLOGY INC·Filed 2001·Granted Dec 2, 2003·11 cites·32 claims
- 3045US7157940B1System and methods for a high-speed dynamic data busINAPAC TECHNOLOGY INC·Filed 2001·Granted Jan 2, 2007·4 cites·6 claims
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