Assignee
HYPERION CORE INC
US·8 granted patents·10 pending applications·64 citations·filing 2012–2023
Top patents by PatentIndex Score
18 records- 0197US9672188B2Optimization of loops and data flow sections in multi-core processor environmentHYPERION CORE INC·Filed 2015·Granted Jun 6, 2017·19 cites·10 claims
- 0296US11687346B2Providing code sections for matrix of arithmetic logic units in a processorHYPERION CORE INC·Filed 2020·Granted Jun 27, 2023·3 cites·6 claims
- 0396US9898297B2Issuing instructions to multiple execution unitsHYPERION CORE INC·Filed 2015·Granted Feb 20, 2018·20 cites·12 claims
- 0495US10908914B2Issuing instructions to multiple execution unitsHYPERION CORE INC·Filed 2019·Granted Feb 2, 2021·11 cites·12 claims
- 0589US9734064B2System and method for a cache in a multi-core processorHYPERION CORE INC·Filed 2015·Granted Aug 15, 2017·5 cites·19 claims
- 0688US10409608B2Issuing instructions to multiple execution unitsHYPERION CORE INC·Filed 2018·Granted Sep 10, 2019·4 cites·10 claims
- 0781US11797474B2High performance processorHYPERION CORE INC·Filed 2020·Granted Oct 24, 2023·1 cites·21 claims
- 0879US2023409334A1Providing code sections for matrix of arithmetic logic units in a processorHYPERION CORE INC·Filed 2023·Application pending·0 cites
- 0976US10331615B2Optimization of loops and data flow sections in multi-core processor environmentHYPERION CORE INC·Filed 2017·Granted Jun 25, 2019·1 cites·20 claims
- 1064US2020042492A1Optimization of loops and data flow sections in multi-core processor environmentHYPERION CORE INC·Filed 2019·Application pending·0 cites
- 1163US2019079769A1Providing code sections for matrix of arithmetic logic units in a processorHYPERION CORE INC·Filed 2018·Application pending·0 cites
- 1260US2019171449A1Tool-level and hardware-level code optimization and respective hardware modificationHYPERION CORE INC·Filed 2019·Application pending·0 cites
- 1358US2016306631A1Providing code sections for matrix of arithmetic logic units in a processorHYPERION CORE INC·Filed 2016·Application pending·0 cites
- 1456US2019197015A1Parallel memory systemsHYPERION CORE INC·Filed 2018·Application pending·0 cites
- 1556US2018039576A1System and method for a cache in a multi-core processorHYPERION CORE INC·Filed 2017·Application pending·0 cites
- 1656US2017364338A1Tool-level and hardware-level code optimization and respective hardware modificationHYPERION CORE INC·Filed 2017·Application pending·0 cites
- 1745US2019377580A1Execution of instructions based on processor and data availabilityHYPERION CORE INC·Filed 2019·Application pending·0 cites
- 1844US2014351563A1Advanced processor architectureHYPERION CORE INC·Filed 2012·Application pending·0 cites
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Counts cover granted patents and pending applications in the PatentIndex corpus. How scoring works →