Assignee
APLUS FLASH TECHNOLOGY INC
US·79 granted patents·9 pending applications·3,405 citations·filing 1997–2014
Top patents by PatentIndex Score
88 records- 0198US9171627B2Non-boosting program inhibit scheme in NAND designAPLUS FLASH TECHNOLOGY INC·Filed 2013·Granted Oct 27, 2015·44 cites·33 claims
- 0298US7164608B2NVRAM memory cell architecture that integrates conventional SRAM and flash cellsAPLUS FLASH TECHNOLOGY INC·Filed 2005·Granted Jan 16, 2007·375 cites·24 claims
- 0398US6862223B1Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layoutAPLUS FLASH TECHNOLOGY INC·Filed 2002·Granted Mar 1, 2005·130 cites·28 claims
- 0498US6714457B1Parallel channel programming scheme for MLC flash memoryAPLUS FLASH TECHNOLOGY INC·Filed 2002·Granted Mar 30, 2004·164 cites·36 claims
- 0597US7369438B2Combo memory design and technology for multiple-function java card, sim-card, bio-passport and bio-id card applicationsAPLUS FLASH TECHNOLOGY INC·Filed 2005·Granted May 6, 2008·65 cites·71 claims
- 0697US7102929B2Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layoutAPLUS FLASH TECHNOLOGY INC·Filed 2005·Granted Sep 5, 2006·51 cites·5 claims
- 0796US6620682B1Set of three level concurrent word line bias conditions for a nor type flash memory arrayAPLUS FLASH TECHNOLOGY INC·Filed 2001·Granted Sep 16, 2003·110 cites·8 claims
- 0896US5953255ALow voltage, low current hot-hole injection erase and hot-electron programmable flash memory with enhanced enduranceAPLUS FLASH TECHNOLOGY INC·Filed 1997·Granted Sep 14, 1999·176 cites·20 claims
- 0995US7110302B2Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layoutAPLUS FLASH TECHNOLOGY INC·Filed 2005·Granted Sep 19, 2006·25 cites·52 claims
- 1095US7075826B2Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layoutAPLUS FLASH TECHNOLOGY INC·Filed 2005·Granted Jul 11, 2006·28 cites·8 claims
- 1195US6850438B2Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operationsAPLUS FLASH TECHNOLOGY INC·Filed 2003·Granted Feb 1, 2005·75 cites·23 claims
- 1295US6556481B13-step write operation nonvolatile semiconductor one-transistor, nor-type flash EEPROM memory cellAPLUS FLASH TECHNOLOGY INC·Filed 2001·Granted Apr 29, 2003·114 cites·22 claims
- 1395US5978283ACharge pump circuitsAPLUS FLASH TECHNOLOGY INC·Filed 1998·Granted Nov 2, 1999·147 cites·18 claims
- 1494US7087953B2Unified non-volatile memory device and method for integrating NOR and NAND-type flash memory and EEPROM device on a single substrateAPLUS FLASH TECHNOLOGY INC·Filed 2005·Granted Aug 8, 2006·23 cites·21 claims
- 1594US6757196B1Two transistor flash memory cell for use in EEPROM arrays with a programmable logic deviceAPLUS FLASH TECHNOLOGY INC·Filed 2001·Granted Jun 29, 2004·83 cites·39 claims
- 1694US5835420ANode-precise voltage regulation for a MOS memory systemAPLUS FLASH TECHNOLOGY INC·Filed 1997·Granted Nov 10, 1998·104 cites·34 claims
- 1793US9019764B2Low-voltage page buffer to be used in NVM designAPLUS FLASH TECHNOLOGY INC·Filed 2012·Granted Apr 28, 2015·17 cites·23 claims
- 1893US7830713B2Bit line gate transistor structure for a multilevel, dual-sided nonvolatile memory cell NAND flash arrayAPLUS FLASH TECHNOLOGY INC·Filed 2008·Granted Nov 9, 2010·25 cites·48 claims
- 1993US7324384B2Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layoutAPLUS FLASH TECHNOLOGY INC·Filed 2006·Granted Jan 29, 2008·18 cites·20 claims
- 2093US6498752B1Three step write process used for a nonvolatile NOR type EEPROM memoryAPLUS FLASH TECHNOLOGY INC·Filed 2001·Granted Dec 24, 2002·83 cites·39 claims
- 2193US6381670B1Flash memory array having maximum and minimum threshold voltage detection for eliminating over-erasure problem and enhancing write operationAPLUS FLASH TECHNOLOGY INC·Filed 1997·Granted Apr 30, 2002·147 cites·43 claims
- 2292US9263137B2NAND array architecture for multiple simutaneous program and readAPLUS FLASH TECHNOLOGY INC·Filed 2014·Granted Feb 16, 2016·12 cites·17 claims
- 2392US6788612B2Flash memory array structure suitable for multiple simultaneous operationsAPLUS FLASH TECHNOLOGY INC·Filed 2003·Granted Sep 7, 2004·50 cites·9 claims
- 2492US6023188APositive/negative high voltage charge pump systemAPLUS FLASH TECHNOLOGY INC·Filed 1999·Granted Feb 8, 2000·101 cites·20 claims
- 2592US6009022ANode-precise voltage regulation for a MOS memory systemAPLUS FLASH TECHNOLOGY INC·Filed 1998·Granted Dec 28, 1999·83 cites·20 claims
- 2691US9230677B2NAND array hiarchical BL structures for multiple-WL and all-BL simultaneous erase, erase-verify, program, program-verify, and read operationsAPLUS FLASH TECHNOLOGY INC·Filed 2014·Granted Jan 5, 2016·12 cites·73 claims
- 2791US7289366B2Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layoutAPLUS FLASH TECHNOLOGY INC·Filed 2006·Granted Oct 30, 2007·19 cites·40 claims
- 2891US7120064B2Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layoutAPLUS FLASH TECHNOLOGY INC·Filed 2005·Granted Oct 10, 2006·15 cites·20 claims
- 2990US8923049B21T1b and 2T2b flash-based, data-oriented EEPROM designAPLUS FLASH TECHNOLOGY INC·Filed 2013·Granted Dec 30, 2014·11 cites·45 claims
- 3090US7283401B2Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layoutAPLUS FLASH TECHNOLOGY INC·Filed 2006·Granted Oct 16, 2007·17 cites·10 claims
- 3190US6660585B1Stacked gate flash memory cell with reduced disturb conditionsAPLUS FLASH TECHNOLOGY INC·Filed 2000·Granted Dec 9, 2003·48 cites·1 claims
- 3290US6031765AReversed split-gate cell arrayAPLUS FLASH TECHNOLOGY INC·Filed 1999·Granted Feb 29, 2000·77 cites·16 claims
- 3389US6240027B1Approach to provide high external voltage for flash memory eraseAPLUS FLASH TECHNOLOGY INC·Filed 2000·Granted May 29, 2001·49 cites·10 claims
- 3489US5978277ABias condition and X-decoder circuit of flash memory arrayAPLUS FLASH TECHNOLOGY INC·Filed 1998·Granted Nov 2, 1999·72 cites·37 claims
- 3588US7177190B2Combination nonvolatile integrated memory system using a universal technology most suitable for high-density, high-flexibility and high-security sim-card, smart-card and e-passport applicationsAPLUS FLASH TECHNOLOGY INC·Filed 2004·Granted Feb 13, 2007·46 cites·26 claims
- 3688US6628563B1Flash memory array for multiple simultaneous operationsAPLUS FLASH TECHNOLOGY INC·Filed 2002·Granted Sep 30, 2003·48 cites·35 claims
- 3787US7064978B2Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layoutAPLUS FLASH TECHNOLOGY INC·Filed 2003·Granted Jun 20, 2006·33 cites·10 claims
- 3887US5917757AFlash memory with high speed erasing structure using thin oxide semiconductor devicesAPLUS FLASH TECHNOLOGY INC·Filed 1997·Granted Jun 29, 1999·67 cites·40 claims
- 3986US7372736B2Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layoutAPLUS FLASH TECHNOLOGY INC·Filed 2006·Granted May 13, 2008·13 cites·13 claims
- 4085US8345481B2NAND based NMOS NOR flash memory cell, a NAND based NMOS NOR flash memory array, and a method of forming a NAND based NMOS NOR flash memory arrayAPLUS FLASH TECHNOLOGY INC·Filed 2011·Granted Jan 1, 2013·8 cites·160 claims
- 4185US6818491B2Set of three level concurrent word line bias conditions for a NOR type flash memory arrayAPLUS FLASH TECHNOLOGY INC·Filed 2003·Granted Nov 16, 2004·29 cites·7 claims
- 4285US6584034B1Flash memory array structure suitable for multiple simultaneous operationsAPLUS FLASH TECHNOLOGY INC·Filed 2002·Granted Jun 24, 2003·28 cites·11 claims
- 4384US6275417B1Multiple level flash memoryAPLUS FLASH TECHNOLOGY INC·Filed 2000·Granted Aug 14, 2001·35 cites·15 claims
- 4484US6258668B1Array architecture and process flow of nonvolatile memory devices for mass storage applicationsAPLUS FLASH TECHNOLOGY INC·Filed 2000·Granted Jul 10, 2001·29 cites·14 claims
- 4583US7154783B2Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operationsAPLUS FLASH TECHNOLOGY INC·Filed 2004·Granted Dec 26, 2006·21 cites·3 claims
- 4682US7688612B2Bit line structure for a multilevel, dual-sided nonvolatile memory cell arrayAPLUS FLASH TECHNOLOGY INC·Filed 2008·Granted Mar 30, 2010·9 cites·20 claims
- 4782US6777292B2Set of three level concurrent word line bias conditions for a NOR type flash memory arrayAPLUS FLASH TECHNOLOGY INC·Filed 2003·Granted Aug 17, 2004·23 cites·9 claims
- 4882US5920503AFlash memory with novel bitline decoder and sourceline latchAPLUS FLASH TECHNOLOGY INC·Filed 1997·Granted Jul 6, 1999·49 cites·20 claims
- 4981US7855912B2Circuit and method for multiple-level programming, reading, and erasing dual-sided nonvolatile memory cellAPLUS FLASH TECHNOLOGY INC·Filed 2008·Granted Dec 21, 2010·8 cites·51 claims
- 5081US7349257B2Combination nonvolatile memory using unified technology with byte, page and block write and simultaneous read and write operationsAPLUS FLASH TECHNOLOGY INC·Filed 2006·Granted Mar 25, 2008·8 cites·4 claims
Showing the top 50 of 88 patent records by PatentIndex Score.
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