Manufacturing method of semiconductor device

Abstract

A semiconductor device in which a defect is suppressed and miniaturization is achieved is provided. An insulating film is formed over a flat surface; a first mask is formed over the insulating film; a second mask is formed by performing a slimming process on the first mask; an insulating layer is formed by performing an etching process on the insulating film using the second mask; an oxide semiconductor layer covering the insulating layer is formed; a conductive film covering the oxide semiconductor layer is formed; a surface of the conductive film is flattened by performing a polishing process on the conductive film; an etching process is performed on the conductive film, so that a conductive layer is formed and a surface of the conductive layer is lower than a surface of an uppermost part of the oxide semiconductor layer; a gate insulating film in contact with the conductive layer and the oxide semiconductor layer is formed; and a gate electrode is formed in a region which is over the gate insulating film and overlaps with the insulating layer.

What is claimed is: 
     
       1. A manufacturing method of a semiconductor device comprising the steps of:
 forming an insulating film over a surface of a substrate; 
 forming a first mask over the insulating film; 
 performing a slimming process on the first mask, so that a second mask is formed; 
 performing an etching process on the insulating film using the second mask, so that an insulating layer is formed; 
 forming an oxide semiconductor layer covering the insulating layer; 
 forming a conductive film covering the oxide semiconductor layer; 
 performing a polishing process on the conductive film, so that a surface of the conductive film is flattened; 
 performing an etching process on the conductive film, so that a conductive layer is formed and a surface of the conductive layer is lower than a surface of an uppermost part of the oxide semiconductor layer; 
 forming a gate insulating film in contact with the conductive layer and the oxide semiconductor layer; and 
 forming a gate electrode in a region which is over the gate insulating film and overlaps with the insulating layer. 
 
     
     
       2. The manufacturing method of the semiconductor device according to  claim 1 , wherein a step height formed by the surface of the uppermost part of the oxide semiconductor layer and the surface of the conductive layer is more than or equal to 5 nm and less than or equal to 20 nm after performing the etching process on the conductive film. 
     
     
       3. The manufacturing method of the semiconductor device according to  claim 1 , wherein the polishing process is performed by chemical mechanical polishing. 
     
     
       4. The manufacturing method of the semiconductor device according to  claim 1 , wherein the surface of the substrate has a root-mean-square roughness of 1 nm or less. 
     
     
       5. The manufacturing method of the semiconductor device according to  claim 1 , wherein the slimming process is an ashing process using an oxygen radical. 
     
     
       6. The manufacturing method of the semiconductor device according to  claim 1 , wherein the insulating film is formed by sputtering. 
     
     
       7. A manufacturing method of a semiconductor device comprising the steps of:
 forming an insulating film over a surface of a substrate; 
 forming a first mask over the insulating film; 
 performing a slimming process on the first mask, so that a second mask is formed; 
 performing an etching process on the insulating film using the second mask, so that an insulating layer is formed; 
 etching a corner of the insulating layer, so that the corner is rounded; 
 forming an oxide semiconductor layer covering the insulating layer; 
 forming a conductive film covering the oxide semiconductor layer; 
 performing a polishing process on the conductive film, so that a surface of the conductive film is flattened; 
 performing an etching process on the conductive film, so that a conductive layer is formed and a surface of the conductive layer is lower than a surface of an uppermost part of the oxide semiconductor layer; 
 forming a gate insulating film in contact with the conductive layer and the oxide semiconductor layer; and 
 forming a gate electrode in a region which is over the gate insulating film and overlaps with the insulating layer. 
 
     
     
       8. The manufacturing method of the semiconductor device according to  claim 7 , wherein a step height formed by the surface of the uppermost part of the oxide semiconductor layer and the surface of the conductive layer is more than or equal to 5 nm and less than or equal to 20 nm after performing the etching process on the conductive film. 
     
     
       9. The manufacturing method of the semiconductor device according to  claim 7 , wherein the polishing process is performed by chemical mechanical polishing. 
     
     
       10. The manufacturing method of the semiconductor device according to  claim 7 , wherein the surface of the substrate has a root-mean-square roughness of 1 nm or less. 
     
     
       11. The manufacturing method of the semiconductor device according to  claim 7 , wherein the slimming process is an ashing process using an oxygen radical. 
     
     
       12. The manufacturing method of the semiconductor device according to  claim 7 , wherein the insulating film is formed by sputtering. 
     
     
       13. A manufacturing method of a semiconductor device comprising the steps of:
 forming a transistor comprising:
 a channel formation region; 
 a first gate insulating film over the channel formation region; 
 a first gate electrode which overlaps with the channel formation region and is over the first gate insulating film; and 
 a source electrode and a drain electrode electrically connected to the channel formation region; 
 
 forming an interlayer insulating film covering the transistor; 
 forming an insulating film over the interlayer insulating film; 
 forming a first mask over the insulating film; 
 performing a slimming process on the first mask, so that a second mask is formed; 
 performing an etching process on the insulating film using the second mask, so that an insulating layer is formed; 
 forming an oxide semiconductor layer covering the insulating layer; 
 forming a conductive film covering the oxide semiconductor layer; 
 performing a polishing process on the conductive film, so that a surface of the conductive film is flattened; 
 performing an etching process on the conductive film, so that a conductive layer is formed and a surface of the conductive layer is lower than a surface of an uppermost part of the oxide semiconductor layer; 
 forming a second gate insulating film in contact with the conductive layer and the oxide semiconductor layer; and 
 forming a second gate electrode in a region which is over the second gate insulating film and overlaps with the insulating layer. 
 
     
     
       14. The manufacturing method of the semiconductor device according to  claim 13 , wherein a step height formed by the surface of the uppermost part of the oxide semiconductor layer and the surface of the conductive layer is more than or equal to 5 nm and less than or equal to 20 nm after performing the etching process on the conductive film. 
     
     
       15. The manufacturing method of the semiconductor device according to  claim 13 , wherein the polishing process is performed by chemical mechanical polishing. 
     
     
       16. The manufacturing method of the semiconductor device according to  claim 13 , wherein a surface on which the interlayer insulating film is formed has a root-mean-square roughness of 1 nm or less. 
     
     
       17. The manufacturing method of the semiconductor device according to  claim 13 , wherein the slimming process is an ashing process using an oxygen radical. 
     
     
       18. The manufacturing method of the semiconductor device according to  claim 13 , wherein the insulating film is formed by sputtering. 
     
     
       19. A manufacturing method of a semiconductor device comprising the steps of:
 forming a transistor comprising:
 a channel formation region; 
 a first gate insulating film over the channel formation region; 
 a first gate electrode which overlaps with the channel formation region and is over the first gate insulating film; and 
 a source electrode and a drain electrode electrically connected to the channel formation region; 
 
 forming an interlayer insulating film covering the transistor; 
 forming an insulating film over the interlayer insulating film; 
 forming a first mask over the insulating film; 
 performing a slimming process on the first mask, so that a second mask is formed; 
 performing an etching process on the insulating film using the second mask, so that an insulating layer is formed; 
 etching a corner of the insulating layer, so that the corner is rounded; 
 forming an oxide semiconductor layer covering the insulating layer; 
 forming a conductive film covering the oxide semiconductor layer; 
 performing a polishing process on the conductive film, so that a surface of the conductive film is flattened; 
 performing an etching process on the conductive film, so that a conductive layer is formed and a surface of the conductive layer is lower than a surface of an uppermost part of the oxide semiconductor layer; 
 forming a second gate insulating film in contact with the conductive layer and the oxide semiconductor layer; and 
 forming a second gate electrode in a region which is over the second gate insulating film and overlaps with the insulating layer. 
 
     
     
       20. The manufacturing method of the semiconductor device according to  claim 19 , wherein a step height formed by the surface of the uppermost part of the oxide semiconductor layer and the surface of the conductive layer is more than or equal to 5 nm and less than or equal to 20 nm after performing the etching process on the conductive film. 
     
     
       21. The manufacturing method of the semiconductor device according to  claim 19 , wherein the polishing process is performed by chemical mechanical polishing. 
     
     
       22. The manufacturing method of the semiconductor device according to  claim 19 , wherein a surface on which the interlayer insulating film is formed has a root-mean-square roughness of 1 nm or less. 
     
     
       23. The manufacturing method of the semiconductor device according to  claim 19 , wherein the slimming process is an ashing process using an oxygen radical. 
     
     
       24. The manufacturing method of the semiconductor device according to  claim 19 , wherein the insulating film is formed by sputtering. 
     
     
       25. A manufacturing method of a semiconductor device comprising the steps of:
 forming an insulating film over a surface of a substrate; 
 forming a first mask over the insulating film; 
 performing a slimming process on the first mask, so that a second mask is formed; 
 performing an etching process on the insulating film using the second mask, so that an insulating layer is formed; 
 forming an oxide semiconductor layer covering the insulating layer; 
 forming a conductive film covering the oxide semiconductor layer; 
 forming a planarizing film over the conductive film; 
 performing an etching process on the planarizing film and the conductive film, so that a conductive layer is formed and a surface of the conductive layer is lower than a surface of an uppermost part of the oxide semiconductor layer; 
 forming a gate insulating film in contact with the conductive layer and the oxide semiconductor layer; and 
 forming a gate electrode in a region which is over the gate insulating film and overlaps with the insulating layer. 
 
     
     
       26. The manufacturing method of the semiconductor device according to  claim 25 , wherein a step height formed by the surface of the uppermost part of the oxide semiconductor layer and the surface of the conductive layer is more than or equal to 5 nm and less than or equal to 20 nm after performing the etching process on the conductive film. 
     
     
       27. The manufacturing method of the semiconductor device according to  claim 25 , wherein the surface of the substrate has a root-mean-square roughness of 1 nm or less. 
     
     
       28. The manufacturing method of the semiconductor device according to  claim 25 , wherein the slimming process is an ashing process using an oxygen radical. 
     
     
       29. The manufacturing method of the semiconductor device according to  claim 25 , wherein the insulating film is formed by sputtering. 
     
     
       30. A manufacturing method of a semiconductor device comprising the steps of:
 forming an insulating film over a surface of a substrate; 
 forming a first mask over the insulating film; 
 performing a slimming process on the first mask, so that a second mask is formed; 
 performing an etching process on the insulating film using the second mask, so that an insulating layer is formed; 
 etching a corner of the insulating layer, so that the corner is rounded; 
 forming an oxide semiconductor layer covering the insulating layer; 
 forming a conductive film covering the oxide semiconductor layer; 
 forming a planarizing film over the conductive film; 
 performing an etching process on the planarizing film and the conductive film, so that a conductive layer is formed and a surface of the conductive layer is lower than a surface of an uppermost part of the oxide semiconductor layer; 
 forming a gate insulating film in contact with the conductive layer and the oxide semiconductor layer; and 
 forming a gate electrode in a region which is over the gate insulating film and overlaps with the insulating layer. 
 
     
     
       31. The manufacturing method of the semiconductor device according to  claim 30 , wherein a step height formed by the surface of the uppermost part of the oxide semiconductor layer and the surface of the conductive layer is more than or equal to 5 nm and less than or equal to 20 nm after performing the etching process on the conductive film. 
     
     
       32. The manufacturing method of the semiconductor device according to  claim 30 , wherein the surface of the substrate has a root-mean-square roughness of 1 nm or less. 
     
     
       33. The manufacturing method of the semiconductor device according to  claim 30 , wherein the slimming process is an ashing process using an oxygen radical. 
     
     
       34. The manufacturing method of the semiconductor device according to  claim 30 , wherein the insulating film is formed by sputtering. 
     
     
       35. A manufacturing method of a semiconductor device comprising the steps of:
 forming a transistor comprising:
 a channel formation region; 
 a first gate insulating film over the channel formation region; 
 a first gate electrode which overlaps with the channel formation region and is over the first gate insulating film; and 
 a source electrode and a drain electrode electrically connected to the channel formation region; 
 
 forming an interlayer insulating film covering the transistor; 
 forming an insulating film over the interlayer insulating film; 
 forming a first mask over the insulating film; 
 performing a slimming process on the first mask, so that a second mask is formed; 
 performing an etching process on the insulating film using the second mask, so that an insulating layer is formed; 
 forming an oxide semiconductor layer covering the insulating layer; 
 forming a conductive film covering the oxide semiconductor layer; 
 forming a planarizing film over the conductive film; 
 performing an etching process on the planarizing film and the conductive film, so that a conductive layer is formed and a surface of the conductive layer is lower than a surface of an uppermost part of the oxide semiconductor layer; 
 forming a second gate insulating film in contact with the conductive layer and the oxide semiconductor layer; and 
 forming a second gate electrode in a region which is over the second gate insulating film and overlaps with the insulating layer. 
 
     
     
       36. The manufacturing method of the semiconductor device according to  claim 35 , wherein a step height formed by the surface of the uppermost part of the oxide semiconductor layer and the surface of the conductive layer is more than or equal to 5 nm and less than or equal to 20 nm after performing the etching process on the conductive film. 
     
     
       37. The manufacturing method of the semiconductor device according to  claim 35 , wherein a surface on which the interlayer insulating film is formed has a root-mean-square roughness of 1 nm or less. 
     
     
       38. The manufacturing method of the semiconductor device according to  claim 35 , wherein the slimming process is an ashing process using an oxygen radical. 
     
     
       39. The manufacturing method of the semiconductor device according to  claim 35 , wherein the insulating film is formed by sputtering. 
     
     
       40. A manufacturing method of a semiconductor device comprising the steps of:
 forming a transistor comprising:
 a channel formation region; 
 a first gate insulating film over the channel formation region; 
 a first gate electrode which overlaps with the channel formation region and is over the first gate insulating film; and 
 a source electrode and a drain electrode electrically connected to the channel formation region; 
 
 forming an interlayer insulating film covering the transistor; 
 forming an insulating film over the interlayer insulating film; 
 forming a first mask over the insulating film; 
 performing a slimming process on the first mask, so that a second mask is formed; 
 performing an etching process on the insulating film using the second mask, so that an insulating layer is formed; 
 etching a corner of the insulating layer, so that the corner is rounded; 
 forming an oxide semiconductor layer covering the insulating layer; 
 forming a conductive film covering the oxide semiconductor layer; 
 forming a planarizing film over the conductive film; 
 performing an etching process on the planarizing film and the conductive film, so that a conductive layer is formed and a surface of the conductive layer is lower than a surface of an uppermost part of the oxide semiconductor layer; 
 forming a second gate insulating film in contact with the conductive layer and the oxide semiconductor layer; and 
 forming a second gate electrode in a region which is over the second gate insulating film and overlaps with the insulating layer. 
 
     
     
       41. The manufacturing method of the semiconductor device according to  claim 40 , wherein a step height formed by the surface of the uppermost part of the oxide semiconductor layer and the surface of the conductive layer is more than or equal to 5 nm and less than or equal to 20 nm after performing the etching process on the conductive film. 
     
     
       42. The manufacturing method of the semiconductor device according to  claim 40 , wherein a surface on which the interlayer insulating film is formed has a root-mean-square roughness of 1 nm or less. 
     
     
       43. The manufacturing method of the semiconductor device according to  claim 40 , wherein the slimming process is an ashing process using an oxygen radical. 
     
     
       44. The manufacturing method of the semiconductor device according to  claim 40 , wherein the insulating film is formed by sputtering.