Integrated optoelectronic device with an avalanche photodetector and method of making the same using commercial CMOS processes

Abstract

An integrated optoelectronic circuit chip for optical data communication systems includes a silicon substrate, at least one MOS field effect transistor (MOSFET) formed on a portion of the silicon substrate, and an avalanche photodetector operatively responsive to an incident optical signal and formed on another portion of the substrate. The avalanche photodetector includes a light absorbing region extending from a top surface of the silicon substrate to a depth h and doped to a first conductivity type. The light absorbing region is ionizable by the incident optical signal to form freed charge carriers in the light absorbing region. A light responsive region is formed in the light absorbing region and extends from the top surface of the silicon substrate to a depth of less than h. The light responsive region is doped to a second conductivity type of opposite polarity to the first conductivity type. The light absorbing region and the light responsive region form a P-N junction at the interface therebetween such that when the light absorbing and light responsive regions are appropriately reverse biased, the freed charge carriers in the light absorbing region are amplified by avalanche multiplication.

I claim:  
     
       1. A method of producing an integrated optoelectronic circuit, comprising the steps of: 
       (a) providing a silicon substrate;  
       (b) forming an MOS field effect transistor on one portion of the silicon substrate using a CMOS-compatible process; and  
       (c) forming an avalanche photodetector on another portion of the silicon substrate using said CMOS-compatible process by:  
       (i) doping the another portion of the silicon substrate with a dopant of a first conductivity type so as to form a light absorbing region having a depth h 1  and of said first conductivity type;  
       (ii) doping a portion of said light absorbing region with a dopant of a second conductivity type of opposite polarity to the first conductivity type to a depth h 2  less than h 1  so as to form a light responsive region having said depth h 2  and of said second conductivity type, to thereby form a P-N junction at an interface defined between the light absorbing region and the light responsive region; and  
       (iii) forming a guard ring circumferentially along an edge of the light responsive region for preventing premature breakdown of the photodetector when the light absorbing region and the light responsive region are reverse biased to thereby create a breakdown electric field.  
     
     
       2. The method of  claim 1 , further comprising the step of doping the silicon substrate with a dopant of the second conductivity type so as to form another P-N an interface defined between the light absorbing region and the silicon substrate for isolating the light absorbing region from charge carriers from the silicon substrate. 
     
     
       3. The method of  claim 1 , further comprising the step of forming on the substrate an isolating region for isolating the light absorbing region from charge carriers from the silicon substrate by doping a region surrounding the light absorbing region with a dopant of the second conductivity type. 
     
     
       4. The method of  claim 1 , wherein the dopant of the first conductivity type is a P-type do pant and the dopant of the second conductivity type is an N-type dopant. 
     
     
       5. The method of  claim 1 , wherein the dopant of the first conductivity type is an N-type dopant and the dopant of the second conductivity type is a P-type dopant.