US2017242589A1PendingUtilityA1

Memory controller, storage device, information processing system, and memory controlling method

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Assignee: SONY CORPPriority: Oct 24, 2014Filed: Oct 6, 2015Published: Aug 24, 2017
Est. expiryOct 24, 2034(~8.3 yrs left)· nominal 20-yr term from priority
G06F 3/064G06F 12/023G06F 3/061G06F 3/0647G06F 12/06G06F 3/0683G06F 12/0215
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Claims

Abstract

To shorten data reading time taken with respect to a memory. A selection unit selects, with respect to a first memory to which access is made in units of blocks that are recording areas divided by a block size constituted by a plurality of pieces of data and in which a plurality of pieces of recording data are recorded from the head of a recording start block, and a second memory to which access is made in units of the blocks and in which the plurality of pieces of recording data are recorded from the middle of the recording start block, one of the first memory and the second memory as a read target on the basis of the number of the blocks necessary for reading data included in the recording data recorded in the first memory or the second memory. A read control unit performs reading from one of the first memory and the second memory on the basis of a result of the selection.

Claims

exact text as granted — not AI-modified
1 . A memory controller comprising:
 a selection unit configured to select, with respect to a first memory to which access is made in units of blocks that are recording areas divided by a block size constituted by a plurality of pieces of data and in which a plurality of pieces of recording data are recorded from the head of a recording start block, and a second memory to which access is made in units of the blocks and in which the plurality of pieces of recording data are recorded from the middle of the recording start block, one of the first memory and the second memory as a read target on the basis of the number of the blocks necessary for reading data included in the recording data recorded in the first memory or the second memory; and   a read control unit configured to perform reading from one of the first memory and the second memory on the basis of a result of the selection.   
     
     
         2 . The memory controller according to  claim 1 , further comprising:
 a write control unit configured to perform writing of the plurality of pieces of recording data from the head of the recording start block of the first memory, generate new recording data by adding predetermined data to the head and tail of the plurality of pieces of recording data, and then write the new recording data from the head of the recording start block of the second memory.   
     
     
         3 . The memory controller according to  claim 1 ,
 wherein the first memory and the second memory are memories that perform burst transfer at the time of writing and reading,   the data is word data, and   the block size is a burst length in the burst transfer.   
     
     
         4 . The memory controller according to  claim 1 ,
 wherein the data is bit data,   the block size is a word size constituted by a plurality of pieces of bit data, and   the block is a word.   
     
     
         5 . A storage device comprising:
 a first memory to which access is made in units of blocks that are recording areas divided by a block size constituted by a plurality of pieces of data and in which a plurality of pieces of recording data are recorded from the head of a recording start block;   a second memory to which access is made in units of the blocks and in which the plurality of pieces of recording data are recorded from the middle of the recording start block;   a selection unit configured to select one of the first memory and the second memory as a read target on the basis of the number of the blocks necessary for reading data included in the recording data recorded in the first memory or the second memory; and   a read control unit configured to perform reading from one of the first memory and the second memory on the basis of a result of the selection.   
     
     
         6 . An information processing system comprising:
 a storage device including
 a first memory to which access is made in units of blocks that are recording areas divided by a block size constituted by a plurality of pieces of data and in which a plurality of pieces of recording data are recorded from the head of a recording start block, 
 a second memory to which access is made in units of the blocks and in which the plurality of pieces of recording data are recorded from the middle of the recording start block, 
 a selection unit configured to select one of the first memory and the second memory as a read target on the basis of the number of the blocks necessary for reading data included in the recording data recorded in the first memory or the second memory, and 
 a read control unit configured to perform reading from one of the first memory and the second memory on the basis of a result of the selection; and 
   a master configured to access the data of the storage device.   
     
     
         7 . A memory controlling method comprising:
 a selection procedure of selecting, with respect to a first memory to which access is made in units of blocks that are recording areas divided by a block size constituted by a plurality of pieces of data and in which a plurality of pieces of recording data are recorded from the head of a recording start block, and a second memory to which access is made in units of the blocks and in which the plurality of pieces of recording data are recorded from the middle of the recording start block, one of the first memory and the second memory as a read target on the basis of the number of the blocks necessary for reading data included in the recording data recorded in the first memory or the second memory; and   a read control procedure of performing reading from one of the first memory and the second memory on the basis of a result of the selection.

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