Semiconductor structure with increased space and volume between shaped epitaxial structures

Abstract

A semiconductor structure includes a bulk silicon substrate and one or more silicon fins coupled to the bulk silicon substrate. Stress-inducing material(s), such as silicon, are epitaxially grown on the fins into naturally diamond-shaped structures using a controlled selective epitaxial growth. The diamond shaped structures are subjected to annealing at about 750° C. to about 850° C. to increase an area of (100) surface orientation by reshaping the shaped structures from the annealing. Additional epitaxial material is grown on the increased (100) area. Multiple cycles of increasing the area of (100) surface orientation (e.g., by the annealing) and growing additional epitaxial material on the increased area are performed to decrease the width of the shaped structures, increasing the space between them to prevent them from merging, while also increasing their volume.

1 . A method, comprising:
 providing a semiconductor structure, the structure comprising a semiconductor substrate and a plurality of semiconductor fins coupled to the semiconductor substrate;   growing epitaxial material on a top surface of the plurality of semiconductor fins, wherein epitaxial material on adjacent fins is separated by a space; and   modifying the epitaxial material to increase the space between adjacent epitaxial material while increasing a volume of the epitaxial material.   
     
     
         2 . The method of  claim 1 , wherein the modifying comprises modifying the epitaxial material to have increased growth in a first direction of the plurality of semiconductor fins with respect to the substrate, and decreased growth of the epitaxial material in a second direction substantially perpendicular to the first direction. 
     
     
         3 . The method of  claim 2 , wherein the modifying comprises:
 increasing an area of (100) surface orientation at a top of the epitaxial material; and   growing additional epitaxial material on the increased area.   
     
     
         4 . The method of  claim 3 , wherein the increasing comprises annealing the epitaxial material. 
     
     
         5 . The method of  claim 4 , wherein the epitaxial material comprises silicon, and wherein the annealing comprises annealing to a temperature of at least about 750° C. 
     
     
         6 . The method of  claim 5 , wherein the temperature comprises about 850° C. 
     
     
         7 . The method of  claim 4 , wherein the increasing and the growing additional epitaxial material are performed in a same chamber. 
     
     
         8 . The method of  claim 3 , further comprising a plurality of cycles of increasing the area of (100) surface orientation and growing additional epitaxial material on the increased area. 
     
     
         9 . The method of  claim 1 , wherein the semiconductor substrate comprises a bulk semiconductor substrate. 
     
     
         10 - 20 . (canceled)