Erase-suspend system and method

Abstract

A method for suspending an erase operation performed on a group of memory cells in a flash memory circuit is disclosed. One example method includes initiating an erase operation on one or more memory cells, the erase operation including a plurality of erase pulses, checking for receipt of a memory command after a predetermined number of erase pulses, suspending, after the predetermined number of erase pulses, the erase operation if the memory command was received, and performing a memory operation associated with the memory command.

What is claimed is: 
     
         1 . A method for performing an erase operation, the method comprising:
 initiating an erase operation on one or more memory cells, the erase operation including a plurality of erase pulses;   checking for receipt of a memory command after a predetermined number of erase pulses;   suspending, after the predetermined number of erase pulses, the erase operation if the memory command was received; and   performing a memory operation associated with the memory command.   
     
     
         2 . The method of  claim 1 , further comprising:
 setting a plurality of erase parameters for use in connection with the erase operation before initiating the erase operation;   adjusting one or more of the erase parameters according to a predetermined set of rules after the erase operation is suspended; and   resuming the erase operation with the adjusted erase parameters.   
     
     
         3 . The method of  claim 1 , further comprising:
 storing one or more erase parameters for use in connection with the erase operation;   performing the memory operation using one or more different parameters; and   recalling the stored one or more erase parameters after performing the memory operation; and   resuming the erase operation with the stored one or more erase parameters.   
     
     
         4 . The method of  claim 1 , further comprising:
 setting one or more erase parameters before initiating the erase operation, wherein the one or more erase parameters are set based on a current number of program/erase cycles.   
     
     
         5 . The method of  claim 1 , further comprising:
 determining whether the one or more memory cells satisfy a predetermined erase threshold, wherein the erase operation is suspended if the memory command was received and the one or memory cells do not satisfy the predetermined erase threshold.   
     
     
         6 . The method of  claim 5 , wherein determining whether the one or more memory cells satisfy a predetermined erase threshold comprises:
 initiating an erase verify operation after the predetermined number of erase pulses.   
     
     
         7 . The method of  claim 1 , wherein the predetermined number of erase pulses is set to one, and the erase verify operation is initiated after each pulse. 
     
     
         8 . The method of  claim 1 , further comprising:
 determining the memory operation has a higher priority than the erase operation.   
     
     
         9 . The method of  claim 1 , wherein the erase operation is performed on a first block of memory and the memory operation is performed on a second block of memory. 
     
     
         10 . The method of  claim 9 , wherein the memory operation is a program operation, an erase operation, or a read operation. 
     
     
         11 . A machine-readable storage medium having instructions stored thereon that, when executed by a processor, perform a method for performing an erase operation, the method comprising:
 initiating an erase operation on one or more memory cells in a flash memory device, the erase operation including performing a plurality of erase pulses;   determining, after a predetermined number of erase pulses, whether a command to perform a memory operation was received;   suspending, after the predetermined number of erase pulses, the erase operation if the command was received;   performing the memory operation; and   resuming the erase operation after the memory operation is completed.   
     
     
         12 . The machine-readable storage medium of  claim 11 , the method further comprising:
 determining one or more parameters associated with the erase operation based on values stored in one or more registers of the flash memory device; and   instructing the flash memory device to resume the erase operation using the one or more determined parameters.   
     
     
         13 . The machine-readable storage medium of  claim 11 , the method further comprising:
 determining one or more erase parameters associated with the erase operation as a function of pulse number and one or more SSD parameters, according to a predetermined set of rules; and   instructing the flash memory device to resume the erase operation using the one or more determined parameters.   
     
     
         14 . The machine-readable storage medium of  claim 11 , wherein the plurality of erase pulses are applied to the one or memory cells by one or more internal components of the flash memory device in response to instructions received from an SSD controller. 
     
     
         15 . The machine-readable storage media of  claim 11 , further comprising:
 determining whether the one or more memory cells satisfy a predetermined erase threshold, wherein the determination of whether the command was received is performed if the predetermined threshold is not met.   
     
     
         16 . The machine-readable storage medium of  claim 15 , wherein determining whether the one or more memory cells satisfy a predetermined erase threshold comprises:
 instructing the flash memory device to initiate an erase verify operation after the predetermined number of erase pulses.   
     
     
         17 . The machine-readable storage medium of  claim 11 , wherein the predetermined number of erase pulses is one and the erase sensing operation is initiated after each pulse. 
     
     
         18 . The machine-readable storage medium of  claim 11 , wherein the erase operation is performed on a first block of memory in the flash memory device and the memory operation is performed on a second block of memory in the flash memory device. 
     
     
         19 . The machine-readable storage medium of  claim 18 , wherein the memory operation is a program operation, an erase operation, or a read operation. 
     
     
         20 . A system, comprising:
 a flash memory device, the flash memory device including one or more blocks of memory; and   a controller operably connected to the flash memory device, the controller operable to:
 initiate an erase operation on one or more memory cells in the flash memory device, the erase operation including a plurality of erase pulses; 
 determine, after the predetermined number of erase pulses, that the one or more memory cells fail to satisfy a predetermined erase threshold; 
 determine that an instruction to perform a memory operation was received after the determination that the one or more memory cells failed to satisfy the predetermined erase threshold; 
 suspend, after the predetermined number of erase pulses, the erase operation on receiving the instruction; 
 performing the memory operation; and 
 resuming the erase operation after the memory operation is completed.