Complementary metal oxide semiconductor image sensor and method for fabricating the same

Abstract

A complementary metal oxide semiconductor image sensor and a method for fabricating the same are disclosed, wherein a width of a depletion area of a photodiode is varied by variably applying a back bias voltage to a semiconductor substrate without using any color filter, thereby preventing a back bias voltage from influencing a transistor formed on the outside of a photodiode in a CMOS image sensor sensing optical color sensitivity of light rays irradiated to the photodiode. The CMOS image sensor includes a first conductive semiconductor substrate having a first region for forming a photodiode and a second region for forming transistors and having a back bias voltage for varying a width of a depletion area in the first region applied thereon, a plurality of transistors formed in the second region of the semiconductor substrate, a photodiode formed in the first region of the semiconductor substrate, a second conductive buried layer formed in the second region of the semiconductor substrate, so as to prevent the back bias voltage from influencing the transistors, and a first isolating barrier formed within the semiconductor substrate, so as to surround a side portion of the second region.

1 . A complementary metal oxide semiconductor (CMOS) image sensor, comprising: a first conductive semiconductor substrate having a first region for forming a photodiode and a second region for forming transistors and having a back bias voltage for varying a width of a depletion area in the first region applied thereon; 
 a plurality of transistors formed in the second region of the semiconductor substrate; a photodiode formed in the first region of the semiconductor substrate;    a second conductive buried layer formed in the second region of the semiconductor substrate, so as to prevent the back bias voltage from influencing the transistors; and    a first isolating barrier formed within the semiconductor substrate, so as to surround a side portion of the second region.    
   
   
       2 . The CMOS image sensor according to  claim 1 , wherein the buried layer is formed of one of a U-shaped form and a horizontal linear form.  
   
   
       3 . The CMOS image sensor according to  claim 2 , wherein the U-shaped buried layer comprises a first buried layer being formed horizontally, and a second buried layer formed between both side ends of the first buried layer and the isolating barrier.  
   
   
       4 . The CMOS image sensor according to  claim 1 , further comprising a second isolating barrier formed within the semiconductor substrate, so as to surround a side portion of the first region.  
   
   
       5 . The CMOS image sensor according to  claim 4 , wherein the first isolating barrier of the side portion in the second region is formed of a conductive layer, and the second isolating barrier of the side portion in the first region is formed of an insulating layer.  
   
   
       6 . The CMOS image sensor according to  claim 4 , wherein the first isolating barrier and the second isolating barrier are both formed of an insulating layer.  
   
   
       7 . The CMOS image sensor according to  claim 1 , wherein the semiconductor layer comprises a first conductive epitaxial layer.  
   
   
       8 . The CMOS image sensor according to  claim 7 , wherein the photodiode comprises the first conductive epitaxial layer and a second conductive diffusion layer formed on a surface of the first conductive epitaxial layer.  
   
   
       9 . The CMOS image sensor according to  claim 8 , wherein the second conductive diffusion layer and the buried layer are isolated from one another.  
   
   
       10 - 19 . (canceled)