Semiconductor device and manufacturing method of the same

Abstract

After a first via hole leading to a ferroelectric capacitor structure are formed in an interlayer insulating film by dry etching, a second via hole to expose part of the ferroelectric capacitor structure is formed in a hydrogen diffusion preventing film so as to be aligned with the first via hole by wet etching, and a via hole constructed by the first via hole and the second via hole communicating with each other is formed.

1 . A manufacturing method of a semiconductor device, comprising the steps of:
 forming a capacitor structure, which is constructed by sandwiching a capacitor film made of a ferroelectric between a lower electrode and an upper electrode, above a semiconductor substrate;   forming a hydrogen diffusion preventing film so that the capacitor structure is covered therewith;   forming an interlayer insulating film which covers the capacitor structure with the hydrogen diffusion preventing film therebetween; and   forming an opening in the interlayer insulating film and the hydrogen diffusion preventing film so that at least part of the capacitor structure is exposed in order to perform wiring connection of the capacitor structure, wherein   in said step of forming the opening, by performing:   a first step of forming a first opening in the interlayer insulating film by dry etching; and   a second step of forming a second opening in a portion of the hydrogen diffusion preventing film aligned with the first opening by wet etching,   the opening constructed by the first opening and the second opening communicating with each other is formed.   
     
     
         2 . The manufacturing method of the semiconductor device according to  claim 1 , wherein the hydrogen diffusion preventing film is made of at least one kind of material selected from the group consisting of Al 2 O 3  (alumina), Al nitrogen oxide, Ta oxide, and Ti oxide. 
     
     
         3 . The manufacturing method of semiconductor device according to  claim 1 , wherein the capacitor structure is of a planar type in which continuity is obtained on the lower electrode and on the upper electrode, respectively. 
     
     
         4 . The manufacturing method of the semiconductor device according to  claim 3 , wherein in forming the opening, the opening to expose part of a surface of the lower electrode and the opening to expose part of a surface of the upper electrode are formed in the same step. 
     
     
         5 . The manufacturing method of the semiconductor device according to  claim 1 , wherein the upper electrode includes a noble metal film in its uppermost layer. 
     
     
         6 . The manufacturing method of the semiconductor device according to  claim 5 , wherein the noble metal film is made of Pt (platinum) or Ir (iridium). 
     
     
         7 . The manufacturing method of the semiconductor device according to  claim 1 , wherein the wet etching is performed using a chemical containing ammonium fluoride, amide, organic acid, organic acid salts, and water. 
     
     
         8 . The manufacturing method of the semiconductor device according to  claim 7 , wherein in the chemical, the concentration of the ammonium fluoride is not less than 1.0% and not more than 4.5%. 
     
     
         9 . The manufacturing method of the semiconductor device according to  claim 1 , wherein the wet etching is performed using a chemical containing ammonium fluoride, glycol ether, amide, and water. 
     
     
         10 . The manufacturing method of the semiconductor device according to  claim 9 , wherein in the chemical, the concentration of the ammonium fluoride is not less than 0.03% and not more than 4.5%. 
     
     
         11 . A semiconductor device, comprising:
 a capacitor structure which is constructed by sandwiching a capacitor film made of a ferroelectric between a lower electrode and an upper electrode and formed above a semiconductor substrate;   a hydrogen diffusion preventing film which is formed so as to cover said capacitor structure;   an interlayer insulating film which covers said capacitor structure with said hydrogen diffusion preventing film therebetween; and   a conductive material which fills an opening formed in said interlayer insulating film and said hydrogen diffusion preventing film so that at least part of said capacitor structure is exposed, wherein   the opening is constructed by a first opening formed in said interlayer insulating film by dry etching and a second opening formed in a portion of said hydrogen diffusion preventing film aligned with the first opening by wet etching communicating with each other.   
     
     
         12 . The semiconductor device according to  claim 11 , wherein the second opening is formed with a larger diameter than the first opening. 
     
     
         13 . The semiconductor device according to  claim 11 , wherein said hydrogen diffusion preventing film is made of at least one kind of material selected from the group consisting of Al 2 O 3  (alumina), Al nitrogen oxide, Ta oxide, and Ti oxide. 
     
     
         14 . The semiconductor device according to  claim 11 , wherein said capacitor structure is of a planar type in which continuity is obtained on the lower electrode and on the upper electrode, respectively. 
     
     
         15 . The semiconductor device according to  claim 11 , wherein the upper electrode includes a noble metal film in its uppermost layer. 
     
     
         16 . The semiconductor device according to  claim 15 , wherein the noble metal film is made of Pt (platinum) or Ir (iridium).