US2005073783A1PendingUtilityA1
Parallel redundant power system and the control method for the same
Est. expiryOct 2, 2023(expired)· nominal 20-yr term from priority
H02M 7/493
31
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Claims
Abstract
A power redundant power system and a method for controlling the power system are presented, wherein the power system is composed of at least one inverter for supplying AC power to a load through a bus, a phase lock system to synchronize all output voltages of the inverters and a current sharing circuit to properly distribute the load current among all inverters. Each inverter is controlled by an unbalanced power to limit the increase of its cross current. Moreover, the information related to DC bus voltage is further applied to control the inverters, whereby the cross current is mitigated and entire power system is operated steadily.
Claims
exact text as granted — not AI-modified1 . A parallel redundant power system composed of plural UPS modules each of which having an inverter, wherein an AC output of each inverter is coupled to a load through a bus for collectively supplying a load current, wherein the plural UPS modules are connected in parallel via a current sharing circuit, a synchronizing clock signal circuit and a communication circuit coupled among the UPS modules,
wherein the synchronizing clock signal circuit controls the phases of all output voltages of the inverters to be synchronal to each other; wherein the current sharing circuit controls the current rate that each UPS module should output, and furthermore by properly controlling unbalance power among the USP modules to mitigate the cross current among the UPS modules; and wherein the communication circuit is used to control information exchange among the parallel UPS modules.
2 . A parallel redundant power system composed of plural inverters, wherein an AC output of each inverter is coupled to a load through a bus for collectively supplying a load current, wherein the plural inverters are connected in parallel via a current sharing circuit, a synchronizing clock signal circuit and a communication circuit coupled among the inverters,
wherein the synchronizing clock signal circuit controls the phases of all output voltages of the inverters to be synchronal to each other; wherein the current sharing circuit controls a rate of current that each inverter should output, and furthermore by properly controlling unbalance power among the USP modules to mitigate the cross current among the inverters; and wherein the communication circuit is used to control information exchange among the plural parallel inverters.
3 . The power system as claimed in claim 1 , wherein the synchronizing clock signal to control the plural inverters is an internal synchronizing signal.
4 . The power system as claimed in claim 2 , wherein the synchronizing clock signal to control the plural inverters is an internal synchronizing signal.
5 . The power system as claimed in claim 1 , wherein the synchronizing clock signal to control the plural inverters is generated by one of the parallel inverters.
6 . The power system as claimed in claim 2 , wherein the synchronizing clock signal to control the plural inverters is generated by one of the parallel inverters.
7 . The power system as claimed in claim 1 , wherein the current sharing circuit controls all plural inverters to equally share the load current based on the quantity of the plural inverters.
8 . The power system as claimed in claim 2 , wherein the current sharing circuit controls all plural inverters to equally share the load current based on the quantity of the plural inverters.
9 . The power system as claimed in claim 1 , wherein the current sharing circuit controls all inverters, which has the same rating capacities, to share the load current with different current sharing ratio.
10 . The power system as claimed in claim 2 , wherein the current sharing circuit controls all inverters, which has the same rating capacities, to share the load current with different current sharing ratio.
11 . The power system as claimed in claim 1 , wherein the plural inverters with different rating capacities are coupled in parallel and share the load current based on ratio commands of the current sharing circuit, wherein each ratio command is independent to the others.
12 . The power system as claimed in claim 2 , wherein the plural inverters with different rating capacities are coupled in parallel and share the load current based on ratio commands of the current sharing circuit, wherein each ratio command is independent to the others.
13 . The power system as claimed in claim 1 , wherein each inverter further comprises a switch element, and when the switch element is switched off, the inverter is isolated from the other inverters and operated independently to supply power to the load.
14 . The power system as claimed in claim 2 , wherein each inverter further comprises a switch element, and when the switch element is switched off, the corresponding inverter is isolated from the other inverters and operated independently to supply power to the load.
15 . The power system as claimed in claim 1 , wherein each inverter further comprises a digital signal processor (DSP) to control the current sharing circuit, the synchronizing clock signal circuit and the communication circuit.
16 . The power system as claimed in claim 2 , wherein each inverter further comprises a digital signal processor (DSP) to control the current sharing circuit, the synchronizing clock signal circuit and the communication circuit.
17 . The power system as claimed in claim 15 , the DSP storing a quick-speed control software for transient control of the power system, wherein the quick-speed control software detects a direct current (DC) voltage of the bus, the output voltage value and the output current value of each inverter, wherein during at least one switching cycle, the rapid control software calculates an inverter current command and a current sharing command to control a pulse width modulation (PWM) signal applied to each inverter.
18 . The power system as claimed in claim 16 , the DSP storing a quick-speed control software for transient control of the power system, wherein the quick-speed control software detects a direct current (DC) voltage of the bus, the output voltage value and the output current value of each inverter, wherein during at least one switching cycle, the rapid control software calculates an inverter current command and a current sharing command to control a pulse width modulation (PWM) signal applied to each inverter.
19 . The power system as claimed in claim 15 , the DSP storing a low-speed control software for static control of the power system, wherein the low-speed control software utilizes calculation of an unbalanced power parameter based on the detected output impedance, the phase difference and voltage difference through the current sharing circuit, further, the low-speed control software adjusts the cross current once per at least one output voltage cycle.
20 . The power system as claimed in claim 16 , the DSP storing a low-speed control software for static control of the power system, wherein the low-speed control software utilizes calculation of an unbalanced power parameter based on the detected output impedance, the phase difference and voltage difference through the current sharing circuit, further, the low-speed control software adjusts the cross current once per at least one output voltage cycle.
21 . The power system as claimed in claim 15 , wherein the DSP is provided to perform the transient control and the static control of the power system, wherein the control gain values of the transient control and the static control are adjustable.
22 . The power system as claimed in claim 16 , wherein the DSP is provided to perform the transient control and the static control of the power system, wherein the control gain values of the transient control and the static control are adjustable.
23 . The power system as claimed in claim 1 , wherein the inverter is an output inverter of the UPS module.
24 . The power system as claimed in claim 1 , wherein there are three phases of the output voltage and at least one of the three phases is controlled to be phase locked.
25 . The power system as claimed in claim 2 , wherein there are three phases of the output voltage and at least one of the three phases is controlled to be phase locked.
26 . A load sharing control method by using an unbalanced power to adjust active power, the method applying for a power system composed of at least two inverters coupled in parallel to provide AC power to a load through a bus, the method comprising the steps of:
sampling an output voltage v o (t), a load current i load (t), and a current sharing command i load *(t) generated from a current sharing circuit; calculating a difference value i e (t) by comparing the sampled load current with the sampled current sharing command, wherein the difference value is expressed by i e (t)=i load *(t)−i load (t); integrating the product of the difference value i e (t) and the output voltage v 0 (t) during an output voltage cycle T, and then calculating an unbalanced power P unbal according to an equation P unbal = 1 T ∫ T i e ( t ) × v o ( t ) ⅆ t ; and adjusting the output voltage v o (t) of the inverter based on the unbalanced power.
27 . The method as claimed in claim 26 further comprising the steps of:
establishing a relationship between the unbalanced power P unbal and a reference voltage V ref , wherein the relationship is expressed by an equation V ref =V setting +K 1 ×P unbal ; wherein V setting is a preset initial voltage of the reference voltage V ref and K 1 is a gain value that is inversely proportional to the difference value i e (t).
28 . The method as claimed in claim 27 , wherein the unbalanced power is generated when the amplitude of the output voltages, the output impedance, or the phases of the output voltages of the at least two inverters are different to each other.
29 . A load sharing control method for adjusting active power, the method applying for a power system composed of at least two inverters coupled in parallel to provide AC power to a load through a bus, the method comprising the steps of:
detecting a DC bus voltage V realBUS ; comparing the detected DC bus voltage V realBUS with a preset DC bus voltage V BUSsetting to obtain a difference value ΔV BUS , where the difference value is expressed by ΔV BUS =V realBUS −V BUSsetting ; establishing a relationship between the difference value ΔV BUS and a reference voltage V ref , where the relationship is expressed by an equation V ref =V setting +K 2 ×ΔV BUS , wherein V setting is a preset initial voltage of the reference voltage V ref and K 2 is a gain value.
30 . The method as claimed in claim 29 , wherein the gain value is inversely proportional to the current sharing difference.
31 . A load sharing control method by using a current sharing error to adjust a transient current of a power system composed of at least two inverters coupled in parallel so as to provide AC power to a load through a bus, the method comprising the steps of:
sampling a load current i load (t) and a current sharing command i avg (t) generated from a current sharing circuit; comparing the sampled load current i load (t) and the current sharing command i avg (t) to obtain a current sharing difference and then multiplying the current sharing difference by a gain value K i2 to derive a compensation command i com (t), where the compensation command is expressed by an equation i com (t)=K i2 *(i avg (t)−i load (t)); and applying the compensation command i com (t) to adjust the load current i load (t).
32 . The method as claimed in claim 31 , wherein the gain value K i2 is inversely proportional to the current sharing difference.
33 . A method for protecting a power system composed of at least two inverters coupled in parallel so as to provide AC power to a load through a bus, the method comprising the steps of:
sampling an output voltage v k and an output current i k during a period N; calculating an active power P NEG , wherein the active power is calculated according to an equation P NEG = ( ∑ k = 0 N v i ) / N ; determining whether the active power is a negative value, if the active power is a negative value and smaller than a preset negative limit value, then isolating the one of the at least two inverters from other inverter.Cited by (0)
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