Multi-layer wiring substrate and manufacturing method thereof

Abstract

A multi-layer wiring substrate capable of high density packaging, and a method of manufacturing the same, in which a carrier substrate, in which through holes can be easily formed in high density corresponding substantially to a pitch of connecting terminals in a semiconductor chip, and build-up layers are formed on the substrate with the application of a conventional build-up technique. When the build-up technique for repeatedly forming insulating layers and wiring layers on a carrier substrate is used to manufacture a multi-layer wiring substrate, the carrier substrate is formed in the following manner. First, an insulating resin layer is formed in a copper foil, in which a plurality of first windows are regularly provided, to cover the copper foil, and the resin layer fills the interior of the windows. Subsequently, second windows of a particular shape are provided in regions of layers of the insulating resin filled in the windows, and independent conducting paths are formed through the second windows to extend from front sides of the second windows to back sides thereof. The conducting paths are formed radially to be spaced a substantially equal distance from centers of the respective second windows.

What is claimed is:  
     
         1 . A multi-layer wiring substrate formed with a wiring structure, which is composed of a build-up laminated body formed by repeatedly stacking insulation layers and wiring layers on a carrier substrate, said carrier substrate comprising: 
 a copper foil provided with a plurality of windows in regular configuration;    an insulating resin layer, which is filled in the windows of said copper foil and coats the copper foil; and    a plurality of independent conductive paths, which are provided in regions of the insulating resin layer filled in the windows of said copper foil, and extend from a front side of the substrate to a back side thereof.    
     
     
         2 . The multi-layer wiring substrate according to  claim 1 , wherein the plurality of independent conductive paths, which are provided in regions of the insulating resin layer filled in the windows of said copper foil, and extend from a front side of the substrate to a back side thereof, are provided radially to be spaced a substantially equal distance from centers of the respective second windows.  
     
     
         3 . The multi-layer wiring substrate according to  claim 1 , wherein the copper foil, which is provided with a plurality of windows in regular configuration and constitutes said carrier substrate, comprises a laminated body, in which plural layers of copper foil stick to one another with insulating materials interposed therebetween.  
     
     
         4 . The multi-layer wiring substrate according to  claim 3 , wherein said laminated body, in which plural layers of copper foil stick to one another with insulating materials interposed therebetween, comprises a laminated body, in which an insulating material mixed with a high dielectric filler as the insulating materials and having a dielectric constant of 10 or more as a whole is used to stick said plural layers of copper foil.  
     
     
         5 . A method of manufacturing a multi-layer wiring substrate, and including the step of forming a wiring structure, which is composed of a build-up laminated body formed by repeatedly stacking insulation layers and wiring layers on a carrier substrate, wherein the step of forming said carrier substrate, comprises the steps of: 
 forming a plurality of windows in a copper foil in regular configuration;    forming an insulating resin layer, which is filled in the windows of said copper foil and coats the copper foil with a uniform thickness; and    forming a plurality of independent conductive paths, which are provided in regions of the insulating resin layer filled in the windows of said copper foil, and extend from a front side of the substrate to a back side thereof.    
     
     
         6 . The method according to  claim 5 , wherein the step of forming a plurality of independent conductive paths, which are provided in regions of the insulating resin layer filled in the windows of said copper foil, and extend from a front side of the substrate to a back side thereof, comprises the steps of: 
 (1) providing a plurality of through openings as second windows in regions of the insulating resin layer filled in the windows of said copper foil;    (2) applying copper plating on the insulating resin layer, which fills said second windows and covers said copper foil; and    (3) selectively applying etching on the copper plating, which is formed on said insulating resin layer, to form lands on at least opening portions of said second windows.    
     
     
         7 . The method according to  claim 5 , wherein the step of forming a plurality of independent conductive paths, which are provided in regions of the insulating resin layer filled in the windows of said copper foil, and extend from a front side of the substrate to a back side thereof, comprises the steps of: 
 (1) forming second windows in regions of the insulating resin layer filled in the windows of said copper foil, said windows having a plurality of convex and concave portions, which portions are disposed radially and in which mountains and valleys are cyclically present in the wall surfaces with the mountains and valleys adjacent to each other to be spaced a substantially equal distance from centers of said windows;    (2) applying copper plating on the insulating resin layer, which covers inner walls of said second windows and said copper foil;    (3) mechanically polishing the inner walls of said second windows to selectively remove the copper plating on said convex portions to leave the copper plating on said concave portions; and    (4) selectively applying etching on at least the copper plating around the opening edges of said second windows among the copper plating formed on said insulating resin layer to form lands connected to the copper plating in the concave portions in said second windows.    
     
     
         8 . The method according to  claim 7 , wherein the step ( 2 ) of applying copper plating on the insulating resin layer, which covers inner walls of said second windows and said copper foil, comprises the step of applying a plating catalyst by chemical copper plating on the concave portions of said second windows without applying copper plating on the convex portions, and wherein the step ( 3 ) of mechanically polishing the inner walls of said second windows to selectively remove the copper plating on said convex portions to leave the copper plating on said concave portions is dispensed with.  
     
     
         9 . The method according to  claim 6  or  7 , wherein the step of forming second windows in regions of the insulating resin layer filled in the windows of said copper foil, comprises laser beam processing.  
     
     
         10 . The method according to  claim 9 , wherein the laser beam processing for forming the second windows comprises using triple harmonic waves and quadruple harmonic waves of the YAG laser and performing projection irradiation of an aperture composed of a plurality of independent figures, whereby the processing for formation of a plurality of holes is performed at a time.  
     
     
         11 . The method according to one of  claims 6  to  10 , wherein a pretreatment for the step of copper plating comprises coarsening surfaces of the insulation resin layer including the side walls of said second windows and subsequently performing chemical copper plating after a plating catalyst is applied.  
     
     
         12 . A semiconductor device comprising a semiconductor chip mounted on the multi-layer wiring substrate according to one of  claims 1  to  4 .