System for multisized bus coupling in a packet-switched computer system

Abstract

A data transfer control system for a computer system having a packet-switched data bus, for controlling the transfer of data words from a device having one bus width to a device having a different bus width. The first bus may be the master bus, and the second bus is a bus of a functional unit, such as a memory or other device, connected to the computer system and coupled to the master bus. When the second bus is smaller than the first bus, the data transfer control system accommodates this by transferring only partial words per clock cycle to the second bus, effectively delaying the transference of data to a rate that the second bus can handle. The transfer rate factor is substantially equal to the ratio of the second bus width to the first bus width. In an alternative embodiment, the data transfer control system transfers the data words at substantially the full rate available, given the computer system's processor or clock speed and the width of the master bus, and the words are buffered before transference to the second bus. The speed of transference to the buffer is then not limited by the size of the second bus, but only by the size of the buffer, which preferably has an input bus at least as wide as that of the master bus. The system accommodates functional units of different sizes all to be couple to a master bus of a given size, where the different sizes may be larger or smaller than the master bus size, and accordingly the functional units can be built with optimal bus sizes for their particular functions without having to conform to a perhaps inappropriate, inefficient or expensive or wasteful master bus size.

What is claimed is:  
     
         1 . A system for transferring data words from a first bus having a first width to a second bus having a second width which is different from said first width, including: 
 a controller configured to remove a request to transfer at least one said word from said first bus to said second bus, including a first subsystem configured to determine said second width, and having a second subsystem configured to execute said transfer at a rate dependent upon said second width.    
     
     
         2 . The system of  claim 1 , further including: 
 a buffer connected between said first bus and said second bus, configured to store a plurality of said words; and    a buffer control configured to transfer said stored words to said second bus in sets corresponding to said second width.    
     
     
         3 . The system of  claim 2 , wherein: 
 said second width is smaller than said first width, and    said sets include portions of said words no larger than said second width.    
     
     
         4 . The system of  claim 2 , wherein: 
 said second width is larger than said first width; and    said sets include supersets of said words larger than said first width.    
     
     
         5 . The system of  claim 1 , wherein said second subsystem includes: 
 a size determination subsystem configured to determine said second width; and    a transfer rate control subsystem configured to transfer said words from said first bus to said second bus at a transfer rate corresponding to said second width.    
     
     
         6 . The system of  claim 5 , wherein: 
 said second width is smaller than said first width, and said transfer rate is determined by said second width.    
     
     
         7 . The system of  claim 5 , wherein: 
 said second width is larger than said first width; and    said transfer rate is substantially at a fill transfer rate for said first bus.    
     
     
         8 . A method for transferring data words from a first bus having a first width to a second bus having a second width which is different from said first width, including the steps of: 
 (1) receiving a request to transfer at least one said word from said first bus to said second bus;    (2) determining said second width; and    (3) executing said transfer at a rate dependent upon said second width.    
     
     
         9 . The method of  claim 8 , wherein step 3 includes the step of buffering a plurality of said words between said first bus and said second bus.  
     
     
         10 . The method of  claim 8 , wherein: 
 said second width is smaller than said first width; and    step 3 includes the step of delaying transfers of at least portions of said words from said first bus to said second bus to accommodate the second bus width.    
     
     
         11 . A computer system, including: 
 a processor;    a first bus having a first width and coupled to the processor, and configured to couple to a second bus of a functional unit, said second bus having a second width which is different from said first width;    a system controller configured to receive a request to transfer at least one said word from said first bus to said second bus, including a first subsystem configured to determine said second width and a second subsystem configured to execute said transfer at a rate dependent upon said second width.    
     
     
         12 . The system of  claim 11 , wherein said second subsystem includes: 
 a buffer connected between said first bus and said second bus, configured to store a plurality of said words; and    a buffer control configured to transfer said stored words to said second bus in sets corresponding to said second width.    
     
     
         13 . The system of  claim 12 , wherein: 
 said second width is smaller than said first width; and    said sets include portions of said words no lager than said second width.    
     
     
         14 . The system of  claim 12 , wherein: 
 said second width is larger than said first width; and    said sets include supersets of said words lager than said first width.    
     
     
         15 . The system of cam  11 , wherein said second subsystem includes: 
 a size determination subsystem configured to determine said second width; and    a transfer rate control subsystem configured to transfer said words from said first bus to said second bus at a transfer rate corresponding to said second width.    
     
     
         16 . The system of  claim 15 , wherein: 
 said second width is smaller than said first width; and    said transfer rate is determined by said second width.    
     
     
         17 . The system of  claim 15 , wherein: 
 said second width is larger than said first width; and    said transfer rate is substantially at a full transfer rate for said first bus.