Bump transfer plate, manufacturing method thereof, semiconductor device, and manufacturing method thereof

Abstract

A bump formation plate is provided with a base and solder bumps formed on the base. The top portion of the solder bump inclines from the center thereof to the periphery thereof. A contact surface of the solder bump with the base may be flat. The base is made of, for example, aluminum or stainless steel.

What is claimed is:  
     
         1 . A bump transfer plate comprising: 
 a base; and    a solder bump formed on said base, a top portion of said solder bump inclining from a central part thereof to a peripheral part thereof.    
     
     
         2 . The bump transfer plate according to  claim 1 , wherein a contact surface of said solder bump with said base is flat.  
     
     
         3 . The bump transfer plate of  claim 1 , wherein said base is made of a kind of metal selected from a group consisting of aluminum and stainless steel.  
     
     
         4 . A method of manufacturing a bump transfer plate, comprising the steps of: 
 forming a photo resist layer on a base, said photo resist layer having a hole at a region where a solder bump is intended to be formed;    stacking a bump formation material into said hole and on said photo resist layer; and    removing said photo resist layer to form a solder bump.    
     
     
         5 . A method of manufacturing a bump transfer plate, comprising the steps of: 
 forming a photo resist layer on a base, said photo resist layer having a hole at a region where a solder bump is intended to be formed;    stacking a bump formation material into said hole and on said photo-resist layer;    applying flux onto a surface of said bump formation material;    heating said bump formation material and said flux; and    removing said flux to form a solder bump.    
     
     
         6 . A method of manufacturing a bump transfer plate, comprising the steps of: 
 burying a solder paste in a hollow formed in a bump formation substrate, the deepest part of said hollow being rounded;    overlapping a base on a surface of said bump formation substrate where said hollow is formed; and    heating said solder paste and said base to form a solder bump.    
     
     
         7 . A method of manufacturing a semiconductor device, comprising the steps of: 
 forming a photo resist layer on a base, said photo resist layer having a hole at a region where a solder bump is intended to be formed;    stacking a bump formation material into said hole and on said photo resist layer;    removing said photo resist layer to form a solder bump; and    bonding an electrode provided to a semiconductor element and said solder bump together.    
     
     
         8 . A method of manufacturing a semiconductor device, comprising the steps of: 
 forming a photo resist layer on a base, said photo resist layer having a hole at a region where a solder bump is intended to be formed;    stacking a bump formation material into said hole and on said photo resist layer;    applying flux onto a surface of said bump formation material;    heating said bump formation material and said flux;    removing said flux to form a solder bump; and    bonding an electrode provided to a semiconductor element and said solder bump together.    
     
     
         9 . A method of manufacturing a semiconductor device, comprising the steps of: 
 burying a solder paste in a hollow formed in a bump formation substrate, the deepest part of said hollow being rounded;    overlapping a base on a surface of said bump formation substrate where said hollow is formed;    heating said solder paste and said base to form a solder bump; and    bonding an electrode provided to a semiconductor element and said solder bump together.    
     
     
         10 . A method of manufacturing a semiconductor device, comprising the steps of: 
 forming a photo resist layer on a base, said photo resist layer having a hole at a region where a solder bump is intended to be formed;    stacking a bump formation material into said hole and on said photo resist layer;    removing said photo resist layer to form a solder bump; and    bonding an electrode provided to a package substrate and said solder bump together.    
     
     
         11 . A method of manufacturing a semiconductor device, comprising the steps of: 
 forming a photo resist layer on a base, said photo resist layer having a hole at a region where a solder bump is intended to be formed;    stacking a bump formation material into said hole and on said photo resist layer;    applying flux onto a surface of said bump formation material;    heating said bump formation material and said flux;    removing said flux to form a solder bump; and    bonding an electrode provided to a package substrate and said solder bump together.    
     
     
         12 . A method of manufacturing a semiconductor device, comprising the steps of: 
 burying a solder paste in a hollow formed in a bump formation substrate, the deepest part of said hollow being rounded;    overlapping a base on a surface of said bump formation substrate where said hollow is formed;    heating said solder paste and said base to form a solder bump; and    bonding an electrode provided to a package substrate and said solder bump together.    
     
     
         13 . A semiconductor device manufactured by a method of  claim 7 , wherein a ratio of voids existing in said solder bump is 10% or less per unit sectional area of said solder bump.  
     
     
         14 . A semiconductor device manufactured by the method of  claim 8 , wherein a ratio of voids existing in said solder bump is 10% or less per unit sectional area of said solder bump.  
     
     
         15 . A semiconductor device manufactured by the method of  claim 9 , wherein a ratio of voids existing in said solder bump is 10% or less per unit sectional area of said solder bump.  
     
     
         16 . A semiconductor device manufactured by the method of  claim 10 , wherein a ratio of voids existing in said solder bump is 10% or less per unit sectional area of said solder bump.  
     
     
         17 . A semiconductor device manufactured by the method of  claim 11 , wherein a ratio of voids existing in said solder bump is 10% or less per unit sectional area of said solder bump.  
     
     
         18 . A semiconductor device manufactured by the method of  claim 12 , wherein a ratio of voids existing in said solder bump is 10% or less per unit sectional area of said solder bump.