Data processor having bios packing compression/decompression architecture

Abstract

To increase the effective capacity of BIOS, an initial portion of the power on system reset (POST) code that is required to enable the system memory is stored in ROM in uncompressed form, and substantially the remaining portion of the BIOS code is stored in compressed form. Upon system initialization during a cold boot, the uncompressed portion of POST is executed from the ROM to enable the system memory, and then an image of the BIOS code is written to shadow memory. As BIOS code is needed during the remainder of the boot, the code is selectively decompressed from the shadow memory to another region of the system memory to which control is transferred. Variations based upon different boot scenarios are described.

What is claimed is:  
     
         1 . A data processing system, comprising: 
 a central processing unit (CPU);    a system memory for storing data in the form of electrical signals;    a first port for receiving an input device generating electrical input signals;    at least one second port for supplying electrical output signals to output devices;    a drive for a mass storage medium;    a system bus interconnecting the CPU, system memory, first and second ports and mass storage medium drive;    the CPU including a BIOS having BIOS code, an initial portion thereof required to enable the system memory being in uncompressed form and a remaining portion thereof being in compressed form, for carrying out prescribed functions including converting operating signals developed by an operating system executed by the CPU into electrical signals compatible with devices that are responsive to signals provided by the CPU to the system bus.    
     
     
         2 . The data processing system of  claim 1 , including means for writing only said compressed portion of said BIOS code to-the system memory.  
     
     
         3 . The data processing system of  claim 2 , including means for decompressing, selectively, portions of said compressed BIOS code stored in said system memory.  
     
     
         4 . The data processing system of  claim 3 , wherein said decompressing means includes means for carrying out a jump between locations within said system memory.  
     
     
         5 . The data processing system of  claim 2 , wherein the portion of said BIOS code that is uncompressed includes a portion of a power on system test (POST) code, a remaining portion of which is compressed.  
     
     
         6 . A method of initializing a data processing system of a type having a central processing unit (CPU), a ROM storing permanent BIOS code and a system memory for selectively storing data, wherein the ROM contains, in uncompressed form, a first portion of BIOS code sufficient to enable the system memory and, in compressed form, another portion of BIOS code, the method comprising, the steps of: 
 in response to a cold boot call, 
 (a) executing the uncompressed portion of BIOS from the ROM to enable the system memory;  
 (b) selectively decompressing said compressed portion of said BIOS code; and  
 (c) executing said decompressed BIOS code.  
   
     
     
         7 . The method of  claim 6 , 
 including, following step (a), the step of copying at least the compressed portion of the BIOS code from the ROM to a shadow memory region in said system memory,    wherein step (b) includes decompressing said compressed portion of said BIOS code to another region of said system memory, and    wherein step (c) includes executing said decompressed BIOS code from said system memory.    
     
     
         8 . A method of initializing a data processing system of a type having a central processing unit (CPU), a ROM storing permanent BIOS code and a system memory for selectively storing data, wherein the ROM contains, in uncompressed form, a first portion of BIOS code sufficient to enable the system memory and, in compressed form, another portion of BIOS code, the method comprising, in response to a cold boot call, and in conjunction with a real mode of operation, the steps of: 
 (a) initiating execution at a first memory address and transferring control to a second memory address in the ROM;    (b) executing the uncompressed portion of BIOS from the second memory address in the ROM to enable the system memory;    (c) copying the entire ROM image of the BIOS from the ROM to the system memory;    (d) selectively decompressing said compressed portion of said BIOS code from a first region of said system memory to a second region of said system memory outside said first region; and    (e) executing said BIOS code from a first region in the system memory; and    in response to a warm boot call, the further steps of:    (f) transferring control of the system to the second address in said system memory;    (g) transferring control of the system to a third region in said system memory outside said second region;    (h) remapping an image from the system memory to said ROM; and    (i) transferring control of the system to said ROM.    
     
     
         9 . A method of initializing a data processing system of a type having a central processing unit (CPU), a ROM storing permanent BIOS code and a system memory for selectively storing data, wherein the ROM contains, in uncompressed form, a first portion of BIOS code sufficient to enable the system memory and, in compressed form, another portion of BIOS code, the method comprising, the steps of: 
 in response to a cold boot call, and in conjunction with a protect mode of operation, 
 (a) executing the uncompressed portion of BIOS from the ROM to enable the system memory;  
 (b) copying the ROM image of the BIOS from the ROM to a first region of the system memory;  
 (c) selectively decompressing said compressed portion of said BIOS code from said first region of said system memory to a second region of said system memory; and  
 (d) executing said BIOS code from the system memory, and  
   in response to a warm boot call, 
 (e) transferring control of said CPU to the same region of the ROM as executed in step (a),  
 (f) transferring control of the CPU to a third region of said system memory; and  
 (g) executing said BIOS code from the system memory.  
   
     
     
         10 . The method of  claim 9 , including, between steps (e) and (f) the following step: 
 (e′) copying the BIOS code to the third region in system memory.