Inventor · disambiguated record
Jose A. Tierno
Also filed as: TIERNO JOSE · TIERNO JOSE A · TIERNO JOSÉ A
61 granted patents·2 pending applications·481 citations·filing 1994–2025
98Inventor score
Top patents by PatentIndex Score
63 records- 0198US8222936B2Phase and frequency detector with output proportional to frequency differenceFRIEDMAN DANIEL J·Filed 2010·Granted Jul 17, 2012·52 cites·25 claims
- 0294US7352297B1Method and apparatus for efficient implementation of digital filter with thermometer-code-like outputIBM·Filed 2007·Granted Apr 1, 2008·35 cites·17 claims
- 0393US9818058B2Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a universal substrate of adaptationIBM·Filed 2016·Granted Nov 14, 2017·13 cites·15 claims
- 0493US8856055B2Reconfigurable and customizable general-purpose circuits for neural networksBREZZO BERNARD V·Filed 2011·Granted Oct 7, 2014·38 cites·27 claims
- 0590US10521391B1Chip to chip interface with scalable bandwidthAPPLE INC·Filed 2018·Granted Dec 31, 2019·5 cites·20 claims
- 0690US8704567B2Hybrid phase-locked loop architecturesAINSPAN HERSCHEL A·Filed 2012·Granted Apr 22, 2014·9 cites·7 claims
- 0790US7750701B2Phase-locked loop circuits and methods implementing multiplexer circuit for fine tuning control of digitally controlled oscillatorsIBM·Filed 2008·Granted Jul 6, 2010·20 cites·16 claims
- 0890US6650699B1Methods and apparatus for timing recovery from a sampled and equalized data signalIBM·Filed 1999·Granted Nov 18, 2003·80 cites·26 claims
- 0988US9373073B2Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a universal substrate of adaptationIBM·Filed 2012·Granted Jun 21, 2016·20 cites·31 claims
- 1088US9207695B2Calibration schemes for charge-recycling stacked voltage domainsIBM·Filed 2014·Granted Dec 8, 2015·7 cites·20 claims
- 1188US8773215B2Fully decoupled LC-tank based oscillator topology for low phase noise and high oscillation amplitude applicationsSADHU BODHISATWA·Filed 2011·Granted Jul 8, 2014·10 cites·25 claims
- 1287US9269042B2Producing spike-timing dependent plasticity in a neuromorphic network utilizing phase change synaptic devicesFRIEDMAN DANIEL J·Filed 2010·Granted Feb 23, 2016·15 cites·29 claims
- 1387US8593226B2Transimpedance amplifierPROESEL JONATHAN E·Filed 2011·Granted Nov 26, 2013·12 cites·23 claims
- 1484US11757681B1Serial data receiver circuit with dither assisted equalizationAPPLE INC·Filed 2022·Granted Sep 12, 2023·1 cites·20 claims
- 1584US8138840B2Optimal dithering of a digitally controlled oscillator with clock dithering for gain and bandwidth controlAINSPAN HERSCHEL A·Filed 2009·Granted Mar 20, 2012·14 cites·23 claims
- 1683US9239984B2Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a neural networkIBM·Filed 2012·Granted Jan 19, 2016·11 cites·20 claims
- 1783US7772900B2Phase-locked loop circuits and methods implementing pulsewidth modulation for fine tuning control of digitally controlled oscillatorsIBM·Filed 2008·Granted Aug 10, 2010·12 cites·14 claims
- 1883US7721182B2Soft error protection in individual memory devicesIBM·Filed 2005·Granted May 18, 2010·12 cites·20 claims
- 1983US7509568B2Error type identification circuit for identifying different types of errors in communications devicesIBM·Filed 2005·Granted Mar 24, 2009·14 cites·14 claims
- 2082US10628732B2Reconfigurable and customizable general-purpose circuits for neural networksIBM·Filed 2016·Granted Apr 21, 2020·3 cites·18 claims
- 2181US8797084B2Calibration schemes for charge-recycling stacked voltage domainsFRIEDMAN DANIEL·Filed 2012·Granted Aug 5, 2014·5 cites·20 claims
- 2281US8704566B2Hybrid phase-locked loop architecturesAINSPAN HERSCHEL A·Filed 2012·Granted Apr 22, 2014·5 cites·16 claims
- 2379US10331998B2Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a neural networkIBM·Filed 2015·Granted Jun 25, 2019·3 cites·15 claims
- 2479US8476945B2Phase profile generatorELAD DANNY·Filed 2011·Granted Jul 2, 2013·5 cites·25 claims
- 2578US9946969B2Producing spike-timing dependent plasticity in a neuromorphic network utilizing phase change synaptic devicesIBM·Filed 2016·Granted Apr 17, 2018·2 cites·17 claims
- 2676US11023403B2Chip to chip interface with scalable bandwidthAPPLE INC·Filed 2019·Granted Jun 1, 2021·1 cites·20 claims
- 2775US8949685B2Soft error protection in individual memory devicesJOSEPH DOUGLAS J·Filed 2010·Granted Feb 3, 2015·6 cites·7 claims
- 2875US7602869B2Methods and apparatus for clock synchronization and data recovery in a receiverIBM·Filed 2005·Granted Oct 13, 2009·7 cites·20 claims
- 2972US12456969B2Data detection on serial communication linksAPPLE INC·Filed 2024·Granted Oct 28, 2025·0 cites·20 claims
- 3071US8493113B2PLL bandwidth correction with offset compensationFERRISS MARK A·Filed 2011·Granted Jul 23, 2013·4 cites·25 claims
- 3169US8994457B2Transimpedance amplifierIBM·Filed 2013·Granted Mar 31, 2015·3 cites·20 claims
- 3267US9953261B2Producing spike-timing dependent plasticity in a neuromorphic network utilizing phase change synaptic devicesIBM·Filed 2016·Granted Apr 24, 2018·1 cites·17 claims
- 3367US8570079B2Reducing phase locked loop phase lock timeFERRISS MARK·Filed 2011·Granted Oct 29, 2013·3 cites·25 claims
- 3466US12267080B2Clock frequency limiterAPPLE INC·Filed 2024·Granted Apr 1, 2025·0 cites·20 claims
- 3566US8640070B2Method and infrastructure for cycle-reproducible simulation on large scale digital circuits on a coordinated set of field-programmable gate arrays (FPGAs)ASAAD SAMEH W·Filed 2010·Granted Jan 28, 2014·3 cites·20 claims
- 3666US7863952B2Method and circuit for controlling clock frequency of an electronic circuit with noise mitigationIBM·Filed 2008·Granted Jan 4, 2011·5 cites·9 claims
- 3765US7107301B2Method and apparatus for reducing latency in a digital signal processing deviceIBM·Filed 2002·Granted Sep 12, 2006·11 cites·20 claims
- 3865US2025350511A1Encoding and Decoding for PAM Transmitter and ReceiverAPPLE INC·Filed 2025·Application pending·0 cites
- 3964US12028075B2Data detection on serial communication linksAPPLE INC·Filed 2022·Granted Jul 2, 2024·0 cites·20 claims
- 4064US8898097B2Reconfigurable and customizable general-purpose circuits for neural networksBREZZO BERNARD V·Filed 2012·Granted Nov 25, 2014·2 cites·2 claims
- 4163US12316483B2Encoding and decoding for PAM transmitter and receiverAPPLE INC·Filed 2022·Granted May 27, 2025·0 cites·20 claims
- 4263US8375269B2Data transmission system and method of correcting an error in parallel data paths of a data transmission systemIBM·Filed 2008·Granted Feb 12, 2013·2 cites·13 claims
- 4361US9460383B2Reconfigurable and customizable general-purpose circuits for neural networksIBM·Filed 2014·Granted Oct 4, 2016·1 cites·18 claims
- 4460US7579887B1Technique for efficiently managing both short-term and long-term frequency adjustments of an electronic circuit clock signalINTERNAT BSUINESS MACHINES COR·Filed 2008·Granted Aug 25, 2009·5 cites·12 claims
- 4559US11295201B2Time-division multiplexed neurosynaptic module with implicit memory addressing for implementing a neural networkIBM·Filed 2019·Granted Apr 5, 2022·0 cites·15 claims
- 4659US7443251B2Digital phase and frequency detectorIBM·Filed 2006·Granted Oct 28, 2008·4 cites·1 claims
- 4758US12021538B2Clock frequency limiterAPPLE INC·Filed 2022·Granted Jun 25, 2024·0 cites·20 claims
- 4858US9240789B2Sub-rate low-swing data receiverFRIEDMAN DANIEL J·Filed 2012·Granted Jan 19, 2016·1 cites·20 claims
- 4957US11270192B2Producing spike-timing dependent plasticity in a neuromorphic network utilizing phase change synaptic devicesIBM·Filed 2018·Granted Mar 8, 2022·0 cites·12 claims
- 5057US11232345B2Producing spike-timing dependent plasticity in a neuromorphic network utilizing phase change synaptic devicesIBM·Filed 2018·Granted Jan 25, 2022·0 cites·7 claims
Showing the top 50 of 63 patent records by PatentIndex Score.
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