Inventor

ANATI ITTAI

IL72 patents

⚠️ This page may combine multiple inventors who share the name “ANATI ITTAI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ANATI ITTAI

INTEL CORP

System and method of converting data formats and communicating between execution units

Coordinating idle state transitions in multi-core processors

Processors, methods, systems, and instructions to support live migration of protected containers

Processors, methods, systems, and instructions to support live migration of protected containers

Using authenticated manifests to enable external certification of multi-processor platforms

Method and apparatus to estimate energy consumed by central processing unit core

Fusion of processor micro-operations

Memory management in secure enclaves

Method and apparatus for branch trace message scheme

Processors, methods, systems, and instructions to support live migration of protected containers

Provisioning keys for virtual machine secure enclaves

Supporting secure memory intent

Instructions and logic to interrupt and resume paging in a secure enclave page cache

Supporting secure memory intent

Secure memory repartitioning

Instructions and logic to interrupt and resume paging in a secure enclave page cache

Paging in secure enclaves

Method and apparatus for securely saving and restoring the state of a computing platform

Modifying memory permissions in a secure processing environment

Programmable event driven yield mechanism which may activate service threads

Processor core and methods to reduce power by not using components dedicated to wide operands when a micro-instruction has narrow operands

Processors, methods, systems, and instructions to support live migration of protected containers

Supporting secure memory intent

Memory management in secure enclaves

Apparatuses, methods, and systems for hashing instructions

Apparatuses, methods, and systems for hashing instructions

Apparatuses, methods, and systems for hashing instructions

Application execution enclave memory method and apparatus

Unblock instruction to reverse page block during paging

Feature licensing in a secure processing environment

Systems and methods for intellectual property-secured, remote debugging

Systems and methods for intellectual property-secured, remote debugging

Processors, methods, systems, and instructions to support live migration of protected containers

Supporting secure memory intent

Supporting secure memory intent

Secure memory repartitioning technologies

Instructions and logic to provide advanced paging capabilities for secure enclave page caches

System and method for soft error handling

Apparatuses, methods, and systems for hashing instructions

Preventing unauthorized access to encrypted memory

Apparatus and method for page walk extension for enhanced security checks

GUERON SHAY

Method and apparatus for memory encryption with integrity check and protection against replay attacks

Tweakable encryption mode for memory encryption with protection against replay attacks

NEWBURN CHRIS J

System to profile and optimize user software in a managed run-time environment

ZOU XIANG

Programmable event-driven yield mechanism

VALENTINE ROBERT

Representing a plurality of instructions with a fewer number of micro-operations

ROZAS CARLOS V

Instructions and logic to provide advanced paging capabilities for secure enclave page caches

SCARLATA VINCENT R

Secure processing environment measurement and attestation

VAN DYKE DON A

Context state management for processor feature sets

HILDESHEIM GUR

Virtual memory address range register