Inventor · disambiguated record
Gur Hildesheim
Also filed as: HILDESHEIM GUR
8 granted patents·3 pending applications·27 citations·filing 2011–2020
82Inventor score
Top patents by PatentIndex Score
11 records- 0190US10713177B2Defining virtualized page attributes based on guest page attributesINTEL CORP·Filed 2016·Granted Jul 14, 2020·7 cites·18 claims
- 0282US10114768B2Enhance memory access permission based on per-page current privilege levelINTEL CORP·Filed 2016·Granted Oct 30, 2018·4 cites·20 claims
- 0381US9069690B2Concurrent page table walker control for TLB miss handlingHILDESHEIM GUR·Filed 2012·Granted Jun 30, 2015·9 cites·19 claims
- 0472US9183161B2Apparatus and method for page walk extension for enhanced security checksINTEL CORP·Filed 2012·Granted Nov 10, 2015·3 cites·21 claims
- 0568US9286235B2Virtual memory address range registerHILDESHEIM GUR·Filed 2012·Granted Mar 15, 2016·2 cites·17 claims
- 0659US9348766B2Balanced P-LRU tree for a “multiple of 3” number of ways cacheBASEL ADI·Filed 2011·Granted May 24, 2016·2 cites·24 claims
- 0759US2020379917A1Defining virtualized page attributes based on guest page attributesINTEL CORP·Filed 2020·Application pending·0 cites
- 0852US9971705B2Virtual memory address range registerINTEL CORP·Filed 2016·Granted May 15, 2018·0 cites·6 claims
- 0947US9720843B2Access type protection of memory reserved for use by processor logicINTEL CORP·Filed 2012·Granted Aug 1, 2017·0 cites·34 claims
- 1046US2014189192A1Apparatus and method for a multiple page size translation lookaside buffer (tlb)RAIKIN SHLOMO·Filed 2012·Application pending·0 cites
- 1135US2017286121A1Apparatus and method for re-execution of faulting operationsHILDESHEIM GUR·Filed 2016·Application pending·0 cites
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