Inventor · disambiguated record
Ran Ginosar
Also filed as: GINOSAR RAN
25 granted patents·2 pending applications·1,112 citations·filing 1990–2018
97Inventor score
Top patents by PatentIndex Score
27 records- 0194US10996959B2Hybrid processorTECHNION RES & DEVELOPMENT FOUND LTD·Filed 2016·Granted May 4, 2021·16 cites·36 claims
- 0290US6600726B1Multiple wireless communication protocol methods and apparatusesMOBILIAN CORP·Filed 1999·Granted Jul 29, 2003·241 cites·22 claims
- 0390US5144442AWide dynamic range cameraSIGHT INC I·Filed 1991·Granted Sep 1, 1992·107 cites·10 claims
- 0489US5247366AColor wide dynamic range cameraSIGHT LTD I·Filed 1991·Granted Sep 21, 1993·182 cites·33 claims
- 0581US6891857B1Multiple wireless communication protocol methods and apparatuses including proactive reduction of interferenceINTEL CORP·Filed 2000·Granted May 10, 2005·38 cites·26 claims
- 0681US5812993ADigital hardware architecture for realizing neural networkTECHNION RES & DEV FOUNDATION·Filed 1997·Granted Sep 22, 1998·112 cites·7 claims
- 0780US5202987AHigh flow-rate synchronizer/scheduler apparatus and method for multiprocessorsBAYER NIMROD·Filed 1991·Granted Apr 13, 1993·107 cites·10 claims
- 0878US7239615B2Multiple wireless communication protocol methods and apparatusesINTEL CORP·Filed 2003·Granted Jul 3, 2007·25 cites·10 claims
- 0973US8090674B2Integrated system and method for multichannel neuronal recording with spike/LFP separation, integrated A/D conversion and threshold detectionGINOSAR RAN·Filed 2005·Granted Jan 3, 2012·7 cites·23 claims
- 1072US5420637ADynamic image representation systemSIGHT INC I·Filed 1990·Granted May 30, 1995·35 cites·24 claims
- 1170US10366752B2Programming for electronic memoriesTECHNION RES & DEV FOUNDATION·Filed 2017·Granted Jul 30, 2019·3 cites·10 claims
- 1267US9449225B2Low power hardware algorithms and architectures for spike sorting and detectionGINOSAR RAN·Filed 2005·Granted Sep 20, 2016·6 cites·12 claims
- 1367US7554475B2Low-power inverted ladder digital-to-analog converterTECHNION RES & DEV FOUNDATION·Filed 2006·Granted Jun 30, 2009·7 cites·13 claims
- 1466US5931944ABranch instruction handling in a self-timed marking systemINTEL CORP·Filed 1997·Granted Aug 3, 1999·49 cites·23 claims
- 1565US5467123AApparatus & method for enhancing color imagesTECHNION RES & DEV FOUNDATION·Filed 1993·Granted Nov 14, 1995·27 cites·60 claims
- 1661US7098899B1Dual form low power, instant on and high performance, non-instant on computing deviceINTEL CORP·Filed 1999·Granted Aug 29, 2006·38 cites·35 claims
- 1759US7096309B2Computing device capable of instant-on and non-instant on modes of operationINTEL CORP·Filed 2004·Granted Aug 22, 2006·5 cites·17 claims
- 1858US5948096AApparatus and method for self-timed marking of variable length instructions having length-affecting prefix bytesINTEL CORP·Filed 1997·Granted Sep 7, 1999·36 cites·18 claims
- 1955US8225265B2Logic circuit delay optimizationMORGENSHTEIN ARKADIY·Filed 2008·Granted Jul 17, 2012·1 cites·32 claims
- 2055US6314553B1Circuit synthesis and verification using relative timingINTEL CORP·Filed 1998·Granted Nov 6, 2001·29 cites·29 claims
- 2147US2010322365A1System and method for synchronizing multi-clock domainsTECHNION RES & DEV FOUNDATION·Filed 2009·Application pending·0 cites
- 2245US5978899AApparatus and method for parallel processing and self-timed serial marking of variable length instructionsINTEL CORP·Filed 1997·Granted Nov 2, 1999·18 cites·37 claims
- 2344US10878906B2Resistive address decoder and virtually addressed memoryTECHNION RES & DEV FOUNDATION·Filed 2018·Granted Dec 29, 2020·0 cites·6 claims
- 2444US10025896B2Exploiting the scan test interface for reverse engineering of a VLSI deviceTECHNION RES & DEV FOUNDATION·Filed 2016·Granted Jul 17, 2018·0 cites·19 claims
- 2540US6931474B1Dual-function computing system having instant-on mode of operationINTEL CORP·Filed 1999·Granted Aug 16, 2005·10 cites·8 claims
- 2640US5941982AEfficient self-timed marking of lengthy variable length instructionsINTEL CORP·Filed 1997·Granted Aug 24, 1999·13 cites·18 claims
- 2738US2002073389A1Clock tuning circuit in chip designFiled 2000·Application pending·0 cites
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