Inventor · disambiguated record
Anirudh Devgan
Also filed as: DEVGAN ANIRUDH
29 granted patents·2 pending applications·1,049 citations·filing 1997–2013
97Inventor score
Top patents by PatentIndex Score
31 records- 0197US7376001B2Row circuit ring oscillator method for evaluating memory cell performanceIBM·Filed 2005·Granted May 20, 2008·81 cites·12 claims
- 0297US7301835B2Internally asymmetric methods and circuits for evaluating static memory cell dynamic stabilityIBM·Filed 2005·Granted Nov 27, 2007·67 cites·2 claims
- 0394US6842714B1Method for determining the leakage power for an integrated circuitIBM·Filed 2003·Granted Jan 11, 2005·82 cites·22 claims
- 0494US6347393B1Method and apparatus for performing buffer insertion with accurate gate and interconnect delay computationIBM·Filed 1999·Granted Feb 12, 2002·230 cites·22 claims
- 0594US6117182AOptimum buffer placement for noise avoidanceIBM·Filed 1998·Granted Sep 12, 2000·229 cites·22 claims
- 0689US7483322B2Ring oscillator row circuit for evaluating memory cell performanceIBM·Filed 2007·Granted Jan 27, 2009·17 cites·10 claims
- 0786US7137080B2Method for determining and using leakage current sensitivities to optimize the design of an integrated circuitIBM·Filed 2003·Granted Nov 14, 2006·42 cites·20 claims
- 0885US7304895B2Bitline variable methods and circuits for evaluating static memory cell dynamic stabilityIBM·Filed 2005·Granted Dec 4, 2007·16 cites·19 claims
- 0985US7000205B2Method, apparatus, and program for block-based static timing analysis with uncertaintyIBM·Filed 2003·Granted Feb 14, 2006·40 cites·20 claims
- 1083US8572523B2Lithography aware leakage analysisTUNCER EMRE·Filed 2007·Granted Oct 29, 2013·17 cites·19 claims
- 1178US8001493B2Efficient method and computer program for modeling and improving static memory performance across process variations and environmental conditionsIBM·Filed 2008·Granted Aug 16, 2011·7 cites·20 claims
- 1271US7561483B2Internally asymmetric method for evaluating static memory cell dynamic stabilityIBM·Filed 2007·Granted Jul 14, 2009·5 cites·8 claims
- 1369US7302661B2Efficient electromagnetic modeling of irregular metal planesIBM·Filed 2005·Granted Nov 27, 2007·4 cites·15 claims
- 1467US6029117Acoupled noise estimation method for on-chip interconnectsIBM·Filed 1997·Granted Feb 22, 2000·50 cites·20 claims
- 1566US6434729B1Two moment RC delay metric for performance optimizationIBM·Filed 2000·Granted Aug 13, 2002·12 cites·15 claims
- 1663US7827514B2Efficient electromagnetic modeling of irregular metal planesIBM·Filed 2007·Granted Nov 2, 2010·2 cites·15 claims
- 1762US7434188B1Lithographically optimized placement toolMAGMA DESIGN AUTOMATION INC·Filed 2006·Granted Oct 7, 2008·4 cites·25 claims
- 1862US6662149B1Method and apparatus for efficient computation of moments in interconnect circuitsIBM·Filed 1999·Granted Dec 9, 2003·44 cites·15 claims
- 1961US6308304B1Method and apparatus for realizable interconnect reduction for on-chip RC circuitsIBM·Filed 1999·Granted Oct 23, 2001·38 cites·22 claims
- 2058US6044209AMethod and system for segmenting wires prior to buffer insertionIBM·Filed 1997·Granted Mar 28, 2000·33 cites·20 claims
- 2156US7558136B2Internally asymmetric methods and circuits for evaluating static memory cell dynamic stabilityIBM·Filed 2007·Granted Jul 7, 2009·2 cites·8 claims
- 2256US7515491B2Method for evaluating leakage effects on static memory cell access timeIBM·Filed 2007·Granted Apr 7, 2009·2 cites·7 claims
- 2353US8473876B2Lithography aware timing analysisTUNCER EMRE·Filed 2007·Granted Jun 25, 2013·1 cites·17 claims
- 2453US6950996B2Interconnect delay and slew metrics based on the lognormal distributionIBM·Filed 2003·Granted Sep 27, 2005·3 cites·21 claims
- 2553US6868533B2Method and system for extending delay and slew metrics to ramp inputsIBM·Filed 2002·Granted Mar 15, 2005·3 cites·24 claims
- 2652US9576098B2Lithography aware leakage analysisSYNOPSYS INC·Filed 2013·Granted Feb 21, 2017·0 cites·20 claims
- 2751US7134103B2Method, system, and product for verifying voltage drop across an entire integrated circuit packageIBM·Filed 2003·Granted Nov 7, 2006·2 cites·42 claims
- 2850US6968306B1Method and system for determining an interconnect delay utilizing an effective capacitance metric (ECM) signal delay modelIBM·Filed 2000·Granted Nov 22, 2005·1 cites·14 claims
- 2948US2006203581A1Efficient method and computer program for modeling and improving static memory performance across process variations and environmental conditionsJOSHI RAJIV V·Filed 2005·Application pending·0 cites
- 3043US2004176939A1Method, system, and product for determining loop inductance of an entire integrated circuit packageIBM·Filed 2003·Application pending·0 cites
- 3139US7036104B1Method of and system for buffer insertion, layer assignment, and wire sizing using wire codesIBM·Filed 1999·Granted Apr 25, 2006·15 cites·21 claims
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