Inventor · disambiguated record
Joseph Anthony Petolino, Jr.
Also filed as: PETOLINO JOSEPH · PETOLINO JOSEPH A · PETOLINO JR JOSEPH A · PETOLINO JR JOSEPH ANTHONY
29 granted patents·1 pending application·713 citations·filing 1983–2024
97Inventor score
Top patents by PatentIndex Score
30 records- 0196US10694129B2Raw scaler with chromatic aberration correctionAPPLE INC·Filed 2015·Granted Jun 23, 2020·17 cites·20 claims
- 0293US9743057B2Systems and methods for lens shading correctionCOTE GUY·Filed 2012·Granted Aug 22, 2017·14 cites·11 claims
- 0391US12041365B2Raw scaler with chromatic aberration correctionAPPLE INC·Filed 2023·Granted Jul 16, 2024·1 cites·20 claims
- 0490US8872946B2Systems and methods for raw image processingCOTE GUY·Filed 2012·Granted Oct 28, 2014·11 cites·21 claims
- 0589US5958041ALatency prediction in a pipelined microarchitectureSUN MICROSYSTEMS INC·Filed 1997·Granted Sep 28, 1999·168 cites·20 claims
- 0681US12279056B2Raw scaler with chromatic aberration correctionAPPLE INC·Filed 2024·Granted Apr 15, 2025·0 cites·20 claims
- 0781US11653118B2Raw scaler with chromatic aberration correctionAPPLE INC·Filed 2020·Granted May 16, 2023·1 cites·20 claims
- 0881US8108650B2Translation lookaside buffer (TLB) with reserved areas for specific sourcesPETOLINO JR JOSEPH A·Filed 2009·Granted Jan 31, 2012·11 cites·15 claims
- 0978US5095424AComputer system architecture implementing split instruction and operand cache line-pair-state managementAMDAHL CORP·Filed 1989·Granted Mar 10, 1992·64 cites·12 claims
- 1076US8316212B2Translation lookaside buffer (TLB) with reserved areas for specific sourcesPETOLINO JR JOSEPH A·Filed 2011·Granted Nov 20, 2012·4 cites·19 claims
- 1174US4780809AApparatus for storing data with deferred uncorrectable error reportingAMDAHL CORP·Filed 1987·Granted Oct 25, 1988·51 cites·16 claims
- 1270US4851993ACache move-in bypassAMDAHL CORP·Filed 1987·Granted Jul 25, 1989·45 cites·9 claims
- 1369US4852100AError detection and correction scheme for main storage unitAMDAHL CORP·Filed 1987·Granted Jul 25, 1989·44 cites·13 claims
- 1464US4888689AApparatus and method for improving cache access throughput in pipelined processorsAMDAHL CORP·Filed 1986·Granted Dec 19, 1989·36 cites·16 claims
- 1560US4855904ACache storage queueAMDAHL CORP·Filed 1988·Granted Aug 8, 1989·30 cites·4 claims
- 1659US8386748B2Address translation unit with multiple virtual queuesAPPLE INC·Filed 2009·Granted Feb 26, 2013·1 cites·21 claims
- 1759US4651321AApparatus for reducing storage necessary for error correction and detection in data processing machinesAMDAHL CORP·Filed 1983·Granted Mar 17, 1987·23 cites·13 claims
- 1857US2013321675A1Raw scaler with chromatic aberration correctionCOTE GUY·Filed 2012·Application pending·0 cites
- 1953US4768197ACache error code updateAMDAHL CORP·Filed 1986·Granted Aug 30, 1988·23 cites·4 claims
- 2052US5898852ALoad instruction steering in a dual data cache microarchitectureSUN MICROSYSTEMS INC·Filed 1997·Granted Apr 27, 1999·28 cites·20 claims
- 2152US5784603AFast handling of branch delay slots on mispredicted branchesSUN MICROSYSTEMS INC·Filed 1996·Granted Jul 21, 1998·28 cites·22 claims
- 2250US4625273AApparatus for fast data storage with deferred error reportingAMDAHL CORP·Filed 1983·Granted Nov 25, 1986·16 cites·5 claims
- 2345US4872111AMonolithic semi-custom IC having standard LSI sections and coupling gate array sectionsAMDAHL CORP·Filed 1988·Granted Oct 3, 1989·15 cites·12 claims
- 2444US5918034AMethod for decoupling pipeline stagesSUN MICROSYSTEMS INC·Filed 1997·Granted Jun 29, 1999·16 cites·13 claims
- 2543US4761783AApparatus and method for reporting occurrences of errors in signals stored in a data processorCHRISTENSEN HAROLD F·Filed 1986·Granted Aug 2, 1988·16 cites·11 claims
- 2641US4722046ACache storage priorityAMDAHL CORP·Filed 1986·Granted Jan 26, 1988·13 cites·6 claims
- 2740US5761722AMethod and apparatus for solving the stale data problem occurring in data access performed with data cachesSUN MICROSYSTEMS INC·Filed 1997·Granted Jun 2, 1998·12 cites·12 claims
- 2836US5838946AMethod and apparatus for accomplishing processor read of selected information through a cache memorySUN MICROSYSTEMS INC·Filed 1995·Granted Nov 17, 1998·8 cites·19 claims
- 2935US5283890ACache memory arrangement with write buffer pipeline providing for concurrent cache determinationsSUN MICROSYSTEMS INC·Filed 1993·Granted Feb 1, 1994·13 cites·12 claims
- 3032US5928355AApparatus for reducing instruction issue stage stalls through use of a staging registerSUN MICROSYSTEMS INC·Filed 1997·Granted Jul 27, 1999·4 cites·19 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →