Inventor · disambiguated record
Kevin S. Petrarca
Also filed as: PETRARCA KEVIN · PETRARCA KEVIN S · PETRARCA KEVIN SHAWN
121 granted patents·24 pending applications·2,097 citations·filing 1998–2022
99Inventor score
Top patents by PatentIndex Score
145 records- 0199US6413852B1Method of forming multilevel interconnect structure containing air gaps including utilizing both sacrificial and placeholder materialIBM·Filed 2000·Granted Jul 2, 2002·264 cites·25 claims
- 0298US6621392B1Micro electromechanical switch having self-aligned spacersIBM·Filed 2002·Granted Sep 16, 2003·211 cites·20 claims
- 0397US6701779B2Perpendicular torsion micro-electromechanical switchIBM·Filed 2002·Granted Mar 9, 2004·82 cites·10 claims
- 0496US6635506B2Method of fabricating micro-electromechanical switches on CMOS compatible substratesIBM·Filed 2001·Granted Oct 21, 2003·155 cites·15 claims
- 0596US6534863B2Common ball-limiting metallurgy for I/O sitesIBM·Filed 2001·Granted Mar 18, 2003·112 cites·17 claims
- 0695US8242604B2Coaxial through-silicon viaVOLANT RICHARD P·Filed 2009·Granted Aug 14, 2012·33 cites·13 claims
- 0795US7696631B2Wire bonding personalization and discrete component attachment on wirebond padsIBM·Filed 2007·Granted Apr 13, 2010·44 cites·20 claims
- 0895US7534696B2Multilayer interconnect structure containing air gaps and method for makingIBM·Filed 2006·Granted May 19, 2009·42 cites·13 claims
- 0994US12444653B2Buried power rail at tight cell-to-cell spaceIBM·Filed 2021·Granted Oct 14, 2025·2 cites·14 claims
- 1094US9030295B2RFID tag with environmental sensorIBM·Filed 2013·Granted May 12, 2015·24 cites·17 claims
- 1193US8394715B2Method of fabricating coaxial through-silicon viaVOLANT RICHARD P·Filed 2012·Granted Mar 12, 2013·16 cites·19 claims
- 1293US7892926B2Fuse link structures using film stress for programming and methods of manufactureIBM·Filed 2009·Granted Feb 22, 2011·21 cites·19 claims
- 1393US6737725B2Multilevel interconnect structure containing air gaps and method for makingIBM·Filed 2002·Granted May 18, 2004·70 cites·12 claims
- 1492US9401323B1Protected through semiconductor via (TSV)IBM·Filed 2015·Granted Jul 26, 2016·8 cites·10 claims
- 1592US8120175B2Soft error rate mitigation by interconnect structureFAROOQ MUKTA G·Filed 2007·Granted Feb 21, 2012·23 cites·8 claims
- 1692US8089105B2Fuse link structures using film stress for programming and methods of manufactureBARTH KARL W·Filed 2010·Granted Jan 3, 2012·14 cites·20 claims
- 1791US8574950B2Electrically contactable grids manufactureCLEVENGER LAWRENCE A·Filed 2010·Granted Nov 5, 2013·7 cites·18 claims
- 1891US8236655B2Fuse link structures using film stress for programming and methods of manufactureBARTH KARL W·Filed 2010·Granted Aug 7, 2012·12 cites·17 claims
- 1991US8017997B2Vertical metal-insulator-metal (MIM) capacitor using gate stack, gate spacer and contact viaIBM·Filed 2008·Granted Sep 13, 2011·21 cites·12 claims
- 2091US6344125B1Pattern-sensitive electrolytic metal platingIBM·Filed 2000·Granted Feb 5, 2002·56 cites·20 claims
- 2189US8822141B1Front side wafer ID processingIBM·Filed 2013·Granted Sep 2, 2014·10 cites·12 claims
- 2289US7629264B2Structure and method for hybrid tungsten copper metal contactIBM·Filed 2008·Granted Dec 8, 2009·18 cites·19 claims
- 2389US6383893B1Method of forming a crack stop structure and diffusion barrier in integrated circuitsIBM·Filed 2000·Granted May 7, 2002·62 cites·14 claims
- 2489US6368484B1Selective plating processIBM·Filed 2000·Granted Apr 9, 2002·56 cites·15 claims
- 2588US8691691B2TSV pillar as an interconnecting structureFAROOQ MUKTA G·Filed 2011·Granted Apr 8, 2014·10 cites·16 claims
- 2688US8367544B2Self-aligned patterned etch stop layers for semiconductor devicesIBM·Filed 2009·Granted Feb 5, 2013·16 cites·11 claims
- 2788US7638406B2Method of fabricating a high Q factor integrated circuit inductorIBM·Filed 2005·Granted Dec 29, 2009·13 cites·16 claims
- 2887US8614115B2Photovoltaic solar cell device manufactureCLEVENGER LAWRENCE A·Filed 2010·Granted Dec 24, 2013·5 cites·3 claims
- 2987US8546961B2Alignment marks to enable 3D integrationFAROOQ MUKTA G·Filed 2011·Granted Oct 1, 2013·9 cites·19 claims
- 3087US8114707B2Method of forming a multi-chip stacked structure including a thin interposer chip having a face-to-back bonding with another chipFAROOQ MUKTA G·Filed 2010·Granted Feb 14, 2012·8 cites·20 claims
- 3187US7528048B2Planar vertical resistor and bond pad resistor and related methodIBM·Filed 2007·Granted May 5, 2009·12 cites·3 claims
- 3286US8665575B2Solar module with overheat protectionCLEVENGER LAWRENCE A·Filed 2011·Granted Mar 4, 2014·4 cites·12 claims
- 3386US7635643B2Method for forming C4 connections on integrated circuit chips and the resulting devicesIBM·Filed 2006·Granted Dec 22, 2009·14 cites·20 claims
- 3485US6819000B2High density area array solder microjoining interconnect structure and fabrication methodIBM·Filed 2003·Granted Nov 16, 2004·28 cites·4 claims
- 3585US6800503B2MEMS encapsulated structure and method of making sameIBM·Filed 2002·Granted Oct 5, 2004·38 cites·31 claims
- 3685US6798029B2Method of fabricating micro-electromechanical switches on CMOS compatible substratesIBM·Filed 2003·Granted Sep 28, 2004·28 cites·11 claims
- 3784US6597068B2Encapsulated metal structures for semiconductor devices and MIM capacitors including the sameIBM·Filed 2001·Granted Jul 22, 2003·27 cites·6 claims
- 3883US6368953B1Encapsulated metal structures for semiconductor devices and MIM capacitors including the sameIBM·Filed 2000·Granted Apr 9, 2002·27 cites·4 claims
- 3982US8349729B2Hybrid bonding interface for 3-dimensional chip integrationIBM·Filed 2012·Granted Jan 8, 2013·6 cites·20 claims
- 4082US7943412B2Low temperature Bi-CMOS compatible process for MEMS RF resonators and filtersIBM·Filed 2002·Granted May 17, 2011·24 cites·9 claims
- 4181US9673095B2Protected through semiconductor via (TSV)IBM·Filed 2016·Granted Jun 6, 2017·3 cites·20 claims
- 4281US8159060B2Hybrid bonding interface for 3-dimensional chip integrationBARTH KARL W·Filed 2009·Granted Apr 17, 2012·10 cites·11 claims
- 4380US7531444B2Method to create air gaps using non-plasma processes to damage ILD materialsIBM·Filed 2005·Granted May 12, 2009·10 cites·30 claims
- 4479US6613641B1Production of metal insulator metal (MIM) structures using anodizing processIBM·Filed 2001·Granted Sep 2, 2003·19 cites·8 claims
- 4578US9093503B1Semiconductor chip with a dual damascene wire and through-substrate via (TSV) structureIBM·Filed 2014·Granted Jul 28, 2015·4 cites·14 claims
- 4678US6661098B2High density area array solder microjoining interconnect structure and fabrication methodIBM·Filed 2002·Granted Dec 9, 2003·18 cites·16 claims
- 4777US6927472B2Fuse structure and method to form the sameIBM·Filed 2001·Granted Aug 9, 2005·20 cites·15 claims
- 4877US6489857B2Multiposition micro electromechanical switchIBM·Filed 2000·Granted Dec 3, 2002·20 cites·10 claims
- 4976US7833893B2Method for forming conductive structuresIBM·Filed 2007·Granted Nov 16, 2010·5 cites·20 claims
- 5075US9040418B2Enhanced capture pads for through semiconductor viasIBM·Filed 2013·Granted May 26, 2015·3 cites·19 claims
Showing the top 50 of 145 patent records by PatentIndex Score.
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