Inventor · disambiguated record
Ethan Schuchman
Also filed as: SCHUCHMAN ETHAN · SCHUCHMAN ETHAN R
22 granted patents·7 pending applications·89 citations·filing 2007–2025
94Inventor score
Top patents by PatentIndex Score
29 records- 0189US12067399B2Conditional instructions predictionAPPLE INC·Filed 2022·Granted Aug 20, 2024·2 cites·20 claims
- 0289US11809874B2Conditional instructions distribution and execution on pipelines having different latencies for mispredictionsAPPLE INC·Filed 2022·Granted Nov 7, 2023·2 cites·20 claims
- 0388US10324724B2Hardware apparatuses and methods to fuse instructionsINTEL CORP·Filed 2015·Granted Jun 18, 2019·7 cites·24 claims
- 0488US9274799B1Instruction and logic for scheduling instructionsINTEL CORP·Filed 2014·Granted Mar 1, 2016·11 cites·20 claims
- 0586US8719547B2Providing hardware support for shared virtual memory between local and remote physical memoryCHINYA GAUTHAM N·Filed 2009·Granted May 6, 2014·20 cites·29 claims
- 0685US8078807B2Accelerating software lookups by using buffered or ephemeral storesSAHA BRATIN·Filed 2007·Granted Dec 13, 2011·13 cites·15 claims
- 0779US9164764B2Single instruction for specifying and saving a subset of registers, specifying a pointer to a work-monitoring function to be executed after waking, and entering a low-power modeINTEL CORP·Filed 2014·Granted Oct 20, 2015·3 cites·20 claims
- 0878US10409763B2Apparatus and method for efficiently implementing a processor pipelineINTEL CORP·Filed 2014·Granted Sep 10, 2019·6 cites·8 claims
- 0978US9223553B2Methods and apparatus to validate translated guest code in a dynamic binary translatorINTEL CORP·Filed 2013·Granted Dec 29, 2015·5 cites·17 claims
- 1078US9003164B2Providing hardware support for shared virtual memory between local and remote physical memoryINTEL CORP·Filed 2014·Granted Apr 7, 2015·4 cites·20 claims
- 1178US8762692B2Single instruction for specifying and saving a subset of registers, specifying a pointer to a work-monitoring function to be executed after waking, and entering a low-power modeSCHUCHMAN ETHAN·Filed 2007·Granted Jun 24, 2014·9 cites·31 claims
- 1276US9858057B2Methods and apparatus to validate translated guest code in a dynamic binary translatorINTEL CORP·Filed 2015·Granted Jan 2, 2018·2 cites·20 claims
- 1375US2025321744A1Using a Next Fetch Predictor Circuit with Short Branches and Return Fetch GroupsAPPLE INC·Filed 2025·Application pending·0 cites
- 1472US2025231767A1Program Counter Zero-Cycle LoadsAPPLE INC·Filed 2025·Application pending·0 cites
- 1571US2024385842A1Conditional Instructions PredictionAPPLE INC·Filed 2024·Application pending·0 cites
- 1667US10055256B2Instruction and logic for scheduling instructionsINTEL CORP·Filed 2016·Granted Aug 21, 2018·1 cites·16 claims
- 1766US9460022B2Mechanism for facilitating dynamic and efficient management of translation buffer prefetching in software programs at computing systemsVENKATASUBRAMANIAN GIRISH·Filed 2013·Granted Oct 4, 2016·3 cites·23 claims
- 1865US12373215B2Using a next fetch predictor circuit with short branches and return fetch groupsAPPLE INC·Filed 2022·Granted Jul 29, 2025·0 cites·20 claims
- 1965US12288070B1Program counter zero-cycle loadsAPPLE INC·Filed 2022·Granted Apr 29, 2025·0 cites·19 claims
- 2063US10877765B2Apparatuses and methods to assign a logical thread to a physical threadINTEL CORP·Filed 2015·Granted Dec 29, 2020·1 cites·24 claims
- 2156US9600283B2Single instruction for specifying a subset of registers to save prior to entering low-power mode, and for specifying a pointer to a function executed after exiting low-power modeINTEL CORP·Filed 2015·Granted Mar 21, 2017·0 cites·19 claims
- 2251US8656113B2Accelerating software lookups by using buffered or ephemeral storesSAHA BRATIN·Filed 2011·Granted Feb 18, 2014·0 cites·23 claims
- 2346US2016179542A1Instruction and logic to perform a fused single cycle increment-compare-jumpLAI PATRICK P·Filed 2014·Application pending·0 cites
- 2445US9996356B2Method and apparatus for recovering from bad store-to-load forwarding in an out-of-order processorINTEL CORP·Filed 2015·Granted Jun 12, 2018·0 cites·14 claims
- 2544US2011106522A1virtual platform for prototyping system-on-chip designsCHINYA GAUTHAM N·Filed 2009·Application pending·0 cites
- 2643US10437590B2Inter-cluster communication of live-in register valuesINTEL CORP·Filed 2017·Granted Oct 8, 2019·0 cites·15 claims
- 2743US9710389B2Method and apparatus for memory aliasing detection in an out-of-order instruction execution platformINTEL CORP·Filed 2015·Granted Jul 18, 2017·0 cites·24 claims
- 2842US2019171461A1Skip ahead allocation and retirement in dynamic binary translation based out-of-order processorsINTEL CORP·Filed 2017·Application pending·0 cites
- 2935US2016283247A1Apparatuses and methods to selectively execute a commit instructionINTEL CORP·Filed 2015·Application pending·0 cites
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