Inventor · disambiguated record
Ahmad Hamzehdoost
Also filed as: HAMZEHDOOST AHMAD · HAMZEHDOOST AHMAD B
13 granted patents·779 citations·filing 1992–1999
94Inventor score
Top patents by PatentIndex Score
13 records- 0195US6069407ABGA package using PCB and tape in a die-up configurationVLSI TECHNOLOGY INC·Filed 1998·Granted May 30, 2000·212 cites·21 claims
- 0294US5689091AMulti-layer substrate structureVLSI TECHNOLOGY INC·Filed 1996·Granted Nov 18, 1997·201 cites·22 claims
- 0383US5999415ABGA package using PCB and tape in a die-down configurationVLSI TECHNOLOGY INC·Filed 1998·Granted Dec 7, 1999·80 cites·18 claims
- 0483US5430331APlastic encapsulated integrated circuit package having an embedded thermal dissipatorVLSI TECHNOLOGY INC·Filed 1993·Granted Jul 4, 1995·80 cites·45 claims
- 0581US5491362APackage structure having accessible chipVLSI TECHNOLOGY INC·Filed 1993·Granted Feb 13, 1996·62 cites·15 claims
- 0673US5910686ACavity down HBGA package structureVLSI TECHNOLOGY INC·Filed 1998·Granted Jun 8, 1999·47 cites·12 claims
- 0762US5687474AMethod of assembling and cooling a package structure with accessible chipVLSI TECHNOLOGY INC·Filed 1996·Granted Nov 18, 1997·25 cites·10 claims
- 0858US5371321APackage structure and method for reducing bond wire inductanceVLSI TECHNOLOGY INC·Filed 1992·Granted Dec 6, 1994·27 cites·15 claims
- 0956US5742009APrinted circuit board layout to minimize the clock delay caused by mismatch in length of metal lines and enhance the thermal performance of microeletronics packages via condution through the package leadsVLSI TECHNOLOGY CORP·Filed 1995·Granted Apr 21, 1998·19 cites·8 claims
- 1050US5539151AReinforced sealing technique for an integrated-circuit packageVLSI TECHNOLOGY INC·Filed 1993·Granted Jul 23, 1996·17 cites·44 claims
- 1138US6047467APrinted circuit board layout to minimize the clock delay caused by mismatch in length of metal lines and enhance the thermal performance of microelectronics packages via conduction through the package leadsVLSI TECHNOLOGY INC·Filed 1997·Granted Apr 11, 2000·6 cites·7 claims
- 1233US6468834B1Method of fabricating a BGA package using PCB and tape in a die-up configurationFiled 1999·Granted Oct 22, 2002·3 cites·13 claims
- 1329US6264778B1Reinforced sealing technique for an integrated circuit packagePHILIPS ELECTRONICS NA·Filed 1994·Granted Jul 24, 2001·0 cites·16 claims
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