Inventor · disambiguated record
Tatsuya Hiramatsu
Also filed as: HIRAMATSU TATSUYA
6 granted patents·1 pending application·177 citations·filing 2000–2011
87Inventor score
Top patents by PatentIndex Score
7 records- 0195US6377502B1Semiconductor device that enables simultaneous read and write/erase operationTOSHIBA KK·Filed 2000·Granted Apr 23, 2002·80 cites·37 claims
- 0292US7126855B2Semiconductor device that enables simultaneous read and write/read operationTOSHIBA KK·Filed 2005·Granted Oct 24, 2006·21 cites·14 claims
- 0388US6829194B2Semiconductor device that enables simultaneous read and write/read operationTOSHIBA KK·Filed 2002·Granted Dec 7, 2004·30 cites·4 claims
- 0486US6512693B2Semiconductor device that enables simultaneous read and write/erase operationTOSHIBA KK·Filed 2001·Granted Jan 28, 2003·28 cites·18 claims
- 0578US7345919B2Semiconductor device that enables simultaneous read and write/read operationTOSHIBA KK·Filed 2006·Granted Mar 18, 2008·7 cites·16 claims
- 0671US6920057B2Semiconductor device that enables simultaneous read and write/read operationTOSHIBA KK·Filed 2004·Granted Jul 19, 2005·11 cites·6 claims
- 0738US2012072877A1Layout verification apparatus and layout verification methodTAKAHASHI HIDEKI·Filed 2011·Application pending·0 cites
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