Inventor · disambiguated record
Jyh-Chyurn Guo
Also filed as: GUO JYH-CHYURN
21 granted patents·685 citations·filing 1991–2016
96Inventor score
Files withTAIWAN SEMICONDUCTOR MFG12MACRONIX INT CO LTD3VANGUARD INT SEMICONDUCT CORP3GUO JYH-CHYURN1IND TECH RES INST1
Top patents by PatentIndex Score
21 records- 0198US6596599B1Gate stack for high performance sub-micron CMOS devicesTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Jul 22, 2003·294 cites·18 claims
- 0289US6894357B2Gate stack for high performance sub-micron CMOS devicesTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted May 17, 2005·39 cites·12 claims
- 0389US6528376B1Sacrificial spacer layer method for fabricating field effect transistor (FET) deviceTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Mar 4, 2003·45 cites·15 claims
- 0486US6596594B1Method for fabricating field effect transistor (FET) device with asymmetric channel region and asymmetric source and drain regionsTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Jul 22, 2003·38 cites·11 claims
- 0585US6888063B1Device and method for providing shielding in radio frequency integrated circuits to reduce noise couplingTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted May 3, 2005·42 cites·29 claims
- 0679US8691599B2Parameter extraction method for semiconductor deviceGUO JYH-CHYURN·Filed 2011·Granted Apr 8, 2014·7 cites·6 claims
- 0777US6847098B1Non-floating body device with enhanced performanceTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Jan 25, 2005·18 cites·8 claims
- 0877US5918125AProcess for manufacturing a dual floating gate oxide flash memory cellMACRONIX INT CO LTD·Filed 1996·Granted Jun 29, 1999·45 cites·17 claims
- 0976US6878964B1Ground-signal-ground pad layout for device tester structureTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Apr 12, 2005·18 cites·23 claims
- 1072US6009017AFloating gate memory with substrate band-to-band tunneling induced hot electron injectionMACRONIX INT CO LTD·Filed 1998·Granted Dec 28, 1999·33 cites·15 claims
- 1171US5243234ADual gate LDMOSFET device for reducing on state resistanceIND TECH RES INST·Filed 1991·Granted Sep 7, 1993·24 cites·13 claims
- 1270US6835622B2Gate electrode doping method for forming semiconductor integrated circuit microelectronic fabrication with varying effective gate dielectric layer thicknessesTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Dec 28, 2004·15 cites·8 claims
- 1363US6627515B1Method of fabricating a non-floating body device with enhanced performanceTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Sep 30, 2003·8 cites·38 claims
- 1461US7071478B2System and method for passing particles on selected areas on a waferTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Jul 4, 2006·4 cites·29 claims
- 1555US6878583B2Integration method to enhance p+ gate activationTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Apr 12, 2005·6 cites·33 claims
- 1653US6323077B1Inverse source/drain process using disposable sidewall spacerVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Nov 27, 2001·18 cites·17 claims
- 1751US6529427B1Test structures for measuring DRAM cell node junction leakage currentVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Mar 4, 2003·13 cites·42 claims
- 1851US6103580AMethod to form ultra-shallow buried-channel MOSFETsVANGUARD INT SEMICONDUCT CORP·Filed 1999·Granted Aug 15, 2000·17 cites·20 claims
- 1933US6352886B2Method of manufacturing floating gate memory with substrate band-to-band tunneling induced hot electron injectionMACRONIX INT CO LTD·Filed 2001·Granted Mar 5, 2002·1 cites·5 claims
- 2028US10345371B2Method for parameter extraction of a semiconductor deviceUNIV NATIONAL CHIAO TUNG·Filed 2016·Granted Jul 9, 2019·0 cites·13 claims
- 2128US6660635B1Pre-LDD wet clean recipe to gain channel length scaling margin beyond sub-0.1 μmTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Dec 9, 2003·0 cites·49 claims
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