Inventor · disambiguated record
Larry Clevenger
Also filed as: CLEVENGER LARRY · CLEVENGER LARRY A
14 granted patents·3 pending applications·498 citations·filing 1998–2011
93Inventor score
Files withIBM9INFINEON TECHNOLOGIES AG2INFINEON TECHNOLOGIES CORP2CLEVENGER LARRY1GLOBALFOUNDRIES SG PTE LTD1
Top patents by PatentIndex Score
17 records- 0198US6420216B1Fuse processing using dielectric planarization pillarsIBM·Filed 2000·Granted Jul 16, 2002·331 cites·16 claims
- 0287US6784105B1Simultaneous native oxide removal and metal neutral deposition methodINFINEON TECHNOLOGIES CORP·Filed 2003·Granted Aug 31, 2004·45 cites·16 claims
- 0383US7365001B2Interconnect structures and methods of making thereofIBM·Filed 2003·Granted Apr 29, 2008·35 cites·16 claims
- 0473US7241696B2Method for depositing a metal layer on a semiconductor interconnect structure having a capping layerINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jul 10, 2007·20 cites·19 claims
- 0562US8232211B1Methods for self-aligned self-assembled patterning enhancementCLEVENGER LARRY·Filed 2011·Granted Jul 31, 2012·1 cites·18 claims
- 0662US7125792B2Dual damascene structure and methodIBM·Filed 2003·Granted Oct 24, 2006·8 cites·24 claims
- 0760US6281114B1Planarization after metal chemical mechanical polishing in semiconductor wafer fabricationINFINEON TECHNOLOGIES AG·Filed 2000·Granted Aug 28, 2001·9 cites·17 claims
- 0858US7091612B2Dual damascene structure and methodIBM·Filed 2003·Granted Aug 15, 2006·8 cites·26 claims
- 0955US6661097B1Ti liner for copper interconnect with low-k dielectricIBM·Filed 2002·Granted Dec 9, 2003·7 cites·20 claims
- 1052US6890815B2Reduced cap layer erosion for borderless contactsIBM·Filed 2003·Granted May 10, 2005·5 cites·25 claims
- 1152US6057236ACVD/PVD method of filling structures using discontinuous CVD AL linerIBM·Filed 1998·Granted May 2, 2000·17 cites·13 claims
- 1244US7906426B2Method of controlled low-k via etch for Cu interconnectionsGLOBALFOUNDRIES SG PTE LTD·Filed 2007·Granted Mar 15, 2011·0 cites·17 claims
- 1339US2005208742A1Oxidized tantalum nitride as an improved hardmask in dual-damascene processingIBM·Filed 2004·Application pending·0 cites
- 1437US2005176237A1In-situ liner formation during reactive ion etchFiled 2004·Application pending·0 cites
- 1536US6361880B1CVD/PVD/CVD/PVD fill processIBM·Filed 1999·Granted Mar 26, 2002·6 cites·5 claims
- 1636US6136709AMetal line deposition processINFINEON TECHNOLOGIES CORP·Filed 1999·Granted Oct 24, 2000·6 cites·28 claims
- 1729US2002016050A1Heat-up time reduction before metal depositionFiled 1999·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →