Inventor · disambiguated record
Richard Gerard Hofmann
Also filed as: HOFMANN RICHARD G · HOFMANN RICHARD GERARD
86 granted patents·7 pending applications·1,919 citations·filing 1991–2024
99Inventor score
Files withIBM45QUALCOMM INC24HOFMANN RICHARD GERARD10SHIRLEN MARTYN RYAN5MICROSOFT TECHNOLOGY LICENSING LLC3
Top patents by PatentIndex Score
93 records- 0195US7249210B2Bus access arbitration schemeQUALCOMM INC·Filed 2005·Granted Jul 24, 2007·58 cites·34 claims
- 0294US8850568B2Method and apparatus for detecting unauthorized access to a computing device and securely communicating information about such unauthorized accessSHIRLEN MARTYN RYAN·Filed 2008·Granted Sep 30, 2014·54 cites·32 claims
- 0394US8839460B2Method for securely communicating information about the location of a compromised computing deviceSHIRLEN MARTYN RYAN·Filed 2008·Granted Sep 16, 2014·55 cites·22 claims
- 0493US9285860B2Apparatus and methods employing variable clock gating hysteresis for a communications portHOFMANN RICHARD GERARD·Filed 2010·Granted Mar 15, 2016·21 cites·22 claims
- 0591US7984202B2Device directed memory barriersQUALCOMM INC·Filed 2007·Granted Jul 19, 2011·25 cites·31 claims
- 0691US5396602AArbitration logic for multiple bus computer systemIBM·Filed 1993·Granted Mar 7, 1995·164 cites·20 claims
- 0790US8077019B2Method of associating groups of classified source addresses with vibration patternsHOFMANN RICHARD GERARD·Filed 2006·Granted Dec 13, 2011·21 cites·20 claims
- 0890US6587905B1Dynamic data bus allocationIBM·Filed 2000·Granted Jul 1, 2003·71 cites·6 claims
- 0989US8661274B2Temperature compensating adaptive voltage scalers (AVSs), systems, and methodsHANSQUINE DAVID W·Filed 2010·Granted Feb 25, 2014·16 cites·34 claims
- 1089US7167971B2System and method for adaptive run-time reconfiguration for a reconfigurable instruction set co-processor architectureIBM·Filed 2004·Granted Jan 23, 2007·42 cites·19 claims
- 1189US5450551ASystem direct memory access (DMA) support logic for PCI based computer systemIBM·Filed 1993·Granted Sep 12, 1995·140 cites·19 claims
- 1288US7917676B2Efficient execution of memory barrier bus commands with order constrained memory accessesQUALCOMM INC·Filed 2006·Granted Mar 29, 2011·18 cites·22 claims
- 1388US7603540B2Using field programmable gate array (FPGA) technology with a microprocessor for reconfigurable, instruction level hardware accelerationIBM·Filed 2008·Granted Oct 13, 2009·17 cites·3 claims
- 1488US6513089B1Dual burst latency timers for overlapped read and write data transfersIBM·Filed 2000·Granted Jan 28, 2003·57 cites·14 claims
- 1587US6772254B2Multi-master computer system with overlapped read and write operations and scalable address pipeliningIBM·Filed 2001·Granted Aug 3, 2004·57 cites·34 claims
- 1686US5548786ADynamic bus sizing of DMA transfersIBM·Filed 1994·Granted Aug 20, 1996·128 cites·10 claims
- 1785US7500045B2Minimizing memory barriers when enforcing strongly-ordered requests in a weakly-ordered processing systemQUALCOMM INC·Filed 2005·Granted Mar 3, 2009·15 cites·21 claims
- 1884US7584345B2System for using FPGA technology with a microprocessor for reconfigurable, instruction level hardware accelerationIBM·Filed 2003·Granted Sep 1, 2009·34 cites·4 claims
- 1984US7395361B2Apparatus and methods for weighted bus arbitration among a plurality of master devices based on transfer direction and/or consumed bandwidthQUALCOMM INC·Filed 2005·Granted Jul 1, 2008·13 cites·42 claims
- 2083US8725488B2Method and apparatus for adaptive voltage scaling based on instruction usageHOFMANN RICHARD GERARD·Filed 2007·Granted May 13, 2014·12 cites·23 claims
- 2183US6826656B2Reducing power in a snooping cache based multiprocessor environmentIBM·Filed 2002·Granted Nov 30, 2004·35 cites·27 claims
- 2281US6633994B1Method and system for optimizing data transfers between devices interconnected by buses operating at different clocking speedsIBM·Filed 2000·Granted Oct 14, 2003·39 cites·22 claims
- 2380US11507423B2Processing data stream modification to reduce power effects during parallel processingQUALCOMM INC·Filed 2020·Granted Nov 22, 2022·1 cites·40 claims
- 2479US9286257B2Bus clock frequency scaling for a bus interconnect and related devices, systems, and methodsHOFMANN RICHARD GERARD·Filed 2011·Granted Mar 15, 2016·7 cites·68 claims
- 2579US5621902AComputer system having a bridge between two buses with a direct memory access controller and an alternative memory access controllerIBM·Filed 1994·Granted Apr 15, 1997·80 cites·3 claims
- 2676US9026744B2Enforcing strongly-ordered requests in a weakly-ordered processingHOFMANN RICHARD GERARD·Filed 2005·Granted May 5, 2015·8 cites·17 claims
- 2776US6823411B2N-way psuedo cross-bar having an arbitration feature using discrete processor local bussesIBM·Filed 2002·Granted Nov 23, 2004·22 cites·23 claims
- 2876US6055584AProcessor local bus posted DMA FlyBy burst transfersIBM·Filed 1997·Granted Apr 25, 2000·82 cites·35 claims
- 2975US8615638B2Memory controllers, systems and methods for applying page management policies based on stream transaction informationSHIRLEN MARTYN RYAN·Filed 2010·Granted Dec 24, 2013·4 cites·31 claims
- 3075US8108838B2System and method for adaptive run-time reconfiguration for a reconfigurable instruction set co-processor architectureASAAD SAMEH W·Filed 2008·Granted Jan 31, 2012·5 cites·18 claims
- 3175US7065595B2Method and apparatus for bus access allocationIBM·Filed 2003·Granted Jun 20, 2006·21 cites·40 claims
- 3275US5642489ABridge between two buses of a computer system with a direct memory access controller with accessible registers to support power managementIBM·Filed 1994·Granted Jun 24, 1997·65 cites·17 claims
- 3373US11983567B2Processing data stream modification to reduce power effects during parallel processingQUALCOMM INC·Filed 2022·Granted May 14, 2024·0 cites·20 claims
- 3473US7093058B2Single request data transfer regardless of size and alignmentIBM·Filed 2005·Granted Aug 15, 2006·6 cites·4 claims
- 3573US6834378B2System on a chip bus with automatic pipeline stage insertion for timing closureIBM·Filed 2002·Granted Dec 21, 2004·15 cites·11 claims
- 3673US5517650ABridge for a power managed computer system with multiple buses and system arbitrationIBM·Filed 1994·Granted May 14, 1996·60 cites·8 claims
- 3772US6970816B1Method and system for efficiently generating parameterized bus transactionsIBM·Filed 2000·Granted Nov 29, 2005·20 cites·16 claims
- 3871US8107492B2Cooperative writes over the address channel of a busHOFMANN RICHARD GERARD·Filed 2006·Granted Jan 31, 2012·4 cites·35 claims
- 3970US7035958B2Re-ordering a first request within a FIFO request queue to a different queue position when the first request receives a retry response from the targetIBM·Filed 2002·Granted Apr 25, 2006·15 cites·21 claims
- 4069US5333274AError detection and recovery in a DMA controllerIBM·Filed 1991·Granted Jul 26, 1994·52 cites·15 claims
- 4168US7921249B2Weakly ordered processing systems and methodsQUALCOMM INC·Filed 2009·Granted Apr 5, 2011·3 cites·22 claims
- 4268US6970962B2Transfer request pipeline throttlingIBM·Filed 2003·Granted Nov 29, 2005·13 cites·19 claims
- 4367US7127562B2Ensuring orderly forward progress in granting snoop castout requestsIBM·Filed 2003·Granted Oct 24, 2006·12 cites·12 claims
- 4467US5561820ABridge for interfacing buses in computer system with a direct memory access controller having dynamically configurable direct memory access channelsIBM·Filed 1994·Granted Oct 1, 1996·48 cites·10 claims
- 4566US7822903B2Single bus command having transfer information for transferring data in a processing systemQUALCOMM INC·Filed 2006·Granted Oct 26, 2010·3 cites·30 claims
- 4665US12481340B2Providing media power telemetry for virtual machines (VMs) in processor-based devicesMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2024·Granted Nov 25, 2025·0 cites·20 claims
- 4765US6907502B2Method for moving snoop pushes to the front of a request queueIBM·Filed 2002·Granted Jun 14, 2005·10 cites·27 claims
- 4865US5557758ABridge between two buses of a computer system that determines the location of memory or accesses from bus masters on one of the busesIBM·Filed 1994·Granted Sep 17, 1996·42 cites·18 claims
- 4964US9760149B2Enhanced dynamic memory management with intelligent current/power consumption minimizationQUALCOMM INC·Filed 2013·Granted Sep 12, 2017·1 cites·16 claims
- 5064US8675679B2Cooperative writes over the address channel of a busHOFMANN RICHARD GERARD·Filed 2011·Granted Mar 18, 2014·1 cites·66 claims
Showing the top 50 of 93 patent records by PatentIndex Score.
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