Inventor · disambiguated record
Yi-Ling Chan
Also filed as: CHAN YI-LING
6 granted patents·3 pending applications·351 citations·filing 2001–2006
86Inventor score
Files withTAIWAN SEMICONDUCTOR MFG9
Top patents by PatentIndex Score
9 records- 0197US6518105B1High performance PD SOI tunneling-biased MOSFETTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Feb 11, 2003·214 cites·14 claims
- 0290US6784071B2Bonded SOI wafer with <100> device layer and <110> substrate for performance improvementTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Aug 31, 2004·58 cites·8 claims
- 0386US6673683B1Damascene gate electrode method for fabricating field effect transistor (FET) device with ion implanted lightly doped extension regionsTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Jan 6, 2004·42 cites·8 claims
- 0485US7122412B2Method of fabricating a necked FINFET deviceTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Oct 17, 2006·33 cites·24 claims
- 0548US6674130B2High performance PD SOI tunneling-biased MOSFETTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Jan 6, 2004·3 cites·16 claims
- 0646US6800516B2Electrostatic discharge device protection structureTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Oct 5, 2004·1 cites·6 claims
- 0746US2007063261A1Necked Finfet deviceTAIWAN SEMICONDUCTOR MFG·Filed 2006·Application pending·0 cites
- 0840US2004266128A1Bonded SOI wafer with <100> device layer and <110> substrate for performance improvementTAIWAN SEMICONDUCTOR MFG·Filed 2004·Application pending·0 cites
- 0931US2003222308A1SOI MOSFET with compact body-tied-source structureTAIWAN SEMICONDUCTOR MFG·Filed 2002·Application pending·0 cites
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