Inventor · disambiguated record
Kenichi Tashiro
Also filed as: TASHIRO KENICHI
8 granted patents·1 pending application·67 citations·filing 1999–2025
85Inventor score
Top patents by PatentIndex Score
9 records- 0190US8055886B2Processor micro-architecture for compute, save or restore multiple registers and responsive to first instruction for repeated issue of second instructionTEXAS INSTRUMENTS INC·Filed 2008·Granted Nov 8, 2011·16 cites·14 claims
- 0284US10564962B2Processor micro-architecture for compute, save or restore multiple registers, devices, systems, methods and processes of manufactureTEXAS INSTRUMENTS INC·Filed 2018·Granted Feb 18, 2020·2 cites·5 claims
- 0383US9557992B2Processor micro-architecture for compute, save or restore multiple registers, devices, systems, methods and processes of manufactureTEXAS INSTRUMENTS INC·Filed 2014·Granted Jan 31, 2017·4 cites·2 claims
- 0482US2025208872A1Processor micro-architecture for repeated instruction executionTEXAS INSTRUMENTS INC·Filed 2025·Application pending·0 cites
- 0577US8713293B2Processor micro-architecture for compute, save or restore multiple registers, devices, systems, methods and processes of manufactureTASHIRO KENICHI·Filed 2011·Granted Apr 29, 2014·4 cites·15 claims
- 0671US12248784B2Processor micro-architecture for compute, save or restore multiple registers, devices, systems, methods and processes of manufactureTEXAS INSTRUMENTS INC·Filed 2020·Granted Mar 11, 2025·0 cites·6 claims
- 0768US6184702B1Crosstalk prevention circuitTEXAS INSTRUMENTS INC·Filed 1999·Granted Feb 6, 2001·41 cites·6 claims
- 0862US10133569B2Processor micro-architecture for compute, save or restore multiple registers, devices, systems, methods and processes of manufactureTEXAS INSTRUMENTS INC·Filed 2016·Granted Nov 20, 2018·0 cites·4 claims
- 0921US8643514B1Method for decoding dataNOBUO FUJHARA·Filed 2012·Granted Feb 4, 2014·0 cites·17 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →