Inventor · disambiguated record
Qing Liu
Also filed as: LIU QING · LIU QING-GUANG
198 granted patents·29 pending applications·866 citations·filing 1997–2024
99Inventor score
Files withST MICROELECTRONICS INC110IBM51AVAGO TECH INT SALES PTE LID19FORTEMEDIA INC7AVAGO TECHNOLOGIES GENERAL IP6
Top patents by PatentIndex Score
227 records- 0198US9793395B1Vertical vacuum channel transistorIBM·Filed 2016·Granted Oct 17, 2017·24 cites·6 claims
- 0298US9748352B2Multi-channel gate-all-around FETST MICROELECTRONICS INC·Filed 2015·Granted Aug 29, 2017·28 cites·20 claims
- 0398US9502518B2Multi-channel gate-all-around FETST MICROELECTRONICS INC·Filed 2014·Granted Nov 22, 2016·46 cites·18 claims
- 0498US9466452B1Integrated cantilever switchST MICROELECTRONICS INC·Filed 2015·Granted Oct 11, 2016·26 cites·21 claims
- 0598US9202920B1Methods for forming vertical and sharp junctions in finFET structuresST MICROELECTRONICS INC·Filed 2014·Granted Dec 1, 2015·42 cites·31 claims
- 0698US8878300B1Semiconductor device including outwardly extending source and drain silicide contact regions and related methodsST MICROELECTRONICS INC·Filed 2013·Granted Nov 4, 2014·44 cites·20 claims
- 0797US9391200B2FinFETs having strained channels, and methods of fabricating finFETs having strained channelsST MICROELECTRONICS INC·Filed 2014·Granted Jul 12, 2016·27 cites·21 claims
- 0897US9082852B1LDMOS FinFET device using a long channel region and method of manufactureST MICROELECTRONICS INC·Filed 2014·Granted Jul 14, 2015·32 cites·30 claims
- 0996US8975168B2Method for the formation of fin structures for FinFET devicesST MICROELECTRONICS INC·Filed 2013·Granted Mar 10, 2015·23 cites·22 claims
- 1095US9748369B2Lateral bipolar junction transistor (BJT) on a silicon-on-insulator (SOI) substrateST MICROELECTRONICS INC·Filed 2016·Granted Aug 29, 2017·14 cites·11 claims
- 1195US9607901B2Integrated tensile strained silicon NFET and compressive strained silicon-germanium PFET implemented in FINFET technologyST MICROELECTRONICS INC·Filed 2015·Granted Mar 28, 2017·12 cites·23 claims
- 1295US9515185B2Silicon germanium-on-insulator FinFETST MICROELECTRONICS INC·Filed 2014·Granted Dec 6, 2016·15 cites·20 claims
- 1395US9202919B1FinFETs and techniques for controlling source and drain junction profiles in finFETsST MICROELECTRONICS INC·Filed 2014·Granted Dec 1, 2015·21 cites·26 claims
- 1494US9653579B2Method for making semiconductor device with filled gate line end recessesST MICROELECTRONICS INC·Filed 2014·Granted May 16, 2017·10 cites·19 claims
- 1594US9640633B1Self aligned gate shape preventing void formationIBM·Filed 2015·Granted May 2, 2017·9 cites·17 claims
- 1694US9425213B1Stacked short and long channel FinFETsST MICROELECTRONICS INC·Filed 2015·Granted Aug 23, 2016·7 cites·19 claims
- 1794US9305974B1High density resistive random access memory (RRAM)ST MICROELECTRONICS INC·Filed 2015·Granted Apr 5, 2016·8 cites·26 claims
- 1894US9299721B2Method for making semiconductor device with different fin setsST MICROELECTRONICS INC·Filed 2014·Granted Mar 29, 2016·14 cites·26 claims
- 1993US10134840B2Series resistance reduction in vertically stacked silicon nanowire transistorsIBM·Filed 2015·Granted Nov 20, 2018·8 cites·9 claims
- 2093US10062690B2Multi-fin FINFET device including epitaxial growth barrier on outside surfaces of outermost fins and related methodsST MICROELECTRONICS INC·Filed 2016·Granted Aug 28, 2018·5 cites·16 claims
- 2193US9799776B2Semi-floating gate FETST MICROELECTRONICS INC·Filed 2015·Granted Oct 24, 2017·7 cites·19 claims
- 2293US9466722B2Large area contacts for small transistorsST MICROELECTRONICS INC·Filed 2014·Granted Oct 11, 2016·11 cites·16 claims
- 2393US9281382B2Method for making semiconductor device with isolation pillars between adjacent semiconductor finsST MICROELECTRONICS INC·Filed 2014·Granted Mar 8, 2016·16 cites·23 claims
- 2493US9240454B1Integrated circuit including a liner silicide with low contact resistanceST MICROELECTRONICS INC·Filed 2014·Granted Jan 19, 2016·14 cites·24 claims
- 2593US9093556B2Multi-fin FINFET device including epitaxial growth barrier on outside surfaces of outermost fins and related methodsLIU QING·Filed 2012·Granted Jul 28, 2015·9 cites·12 claims
- 2693US9018057B1Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) waferST MICROELECTRONICS INC·Filed 2013·Granted Apr 28, 2015·10 cites·27 claims
- 2792US10276573B2FinFET including tunable fin height and tunable fin width ratioIBM·Filed 2016·Granted Apr 30, 2019·6 cites·16 claims
- 2892US9685380B2Method to co-integrate SiGe and Si channels for finFET devicesST MICROELECTRONICS INC·Filed 2013·Granted Jun 20, 2017·8 cites·15 claims
- 2992US9660083B2LDMOS finFET device and method of manufacture using a trench confined epitaxial growth processST MICROELECTRONICS INC·Filed 2014·Granted May 23, 2017·9 cites·30 claims
- 3092US9484535B1High density resistive random access memory (RRAM)ST MICROELECTRONICS INC·Filed 2015·Granted Nov 1, 2016·6 cites·16 claims
- 3192US9219078B2Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETsIBM·Filed 2013·Granted Dec 22, 2015·11 cites·15 claims
- 3292US9171757B2Dual shallow trench isolation liner for preventing electrical shortsIBM·Filed 2013·Granted Oct 27, 2015·8 cites·9 claims
- 3391US9859423B2Hetero-channel FinFETST MICROELECTRONICS INC·Filed 2014·Granted Jan 2, 2018·8 cites·21 claims
- 3491US9660057B2Method of forming a reduced resistance fin structureST MICROELECTRONICS INC·Filed 2014·Granted May 23, 2017·8 cites·23 claims
- 3591US9646962B1Low leakage gate controlled vertical electrostatic discharge protection device integration with a planar FinFETIBM·Filed 2016·Granted May 9, 2017·7 cites·25 claims
- 3691US9466720B2Method of making a CMOS semiconductor device using a stressed silicon-on-insulator (SOI) waferST MICROELECTRONICS INC·Filed 2015·Granted Oct 11, 2016·5 cites·23 claims
- 3791US9263338B2Semiconductor device including vertically spaced semiconductor channel structures and related methodsST MICROELECTRONICS INC·Filed 2013·Granted Feb 16, 2016·13 cites·18 claims
- 3891US8703550B2Dual shallow trench isolation liner for preventing electrical shortsDORIS BRUCE B·Filed 2012·Granted Apr 22, 2014·8 cites·11 claims
- 3990US9105691B2Contact isolation scheme for thin buried oxide substrate devicesIBM·Filed 2013·Granted Aug 11, 2015·11 cites·16 claims
- 4089US10505020B2FinFET LDMOS devices with improved reliabilityAVAGO TECH INT SALES PTE LID·Filed 2017·Granted Dec 10, 2019·5 cites·19 claims
- 4189US10340195B2Method to co-integrate SiGe and Si channels for finFET devicesST MICROELECTRONICS INC·Filed 2017·Granted Jul 2, 2019·3 cites·20 claims
- 4289US10157628B1Sound identification device with microphone arrayFORTEMEDIA INC·Filed 2018·Granted Dec 18, 2018·8 cites·10 claims
- 4389US9917195B2High doped III-V source/drain junctions for field effect transistorsIBM·Filed 2015·Granted Mar 13, 2018·4 cites·8 claims
- 4489US9620507B2Silicon-on-nothing transistor semiconductor structure with channel epitaxial silicon-germanium regionST MICROELECTRONICS INC·Filed 2013·Granted Apr 11, 2017·6 cites·22 claims
- 4589US9437504B2Method for the formation of fin structures for FinFET devicesST MICROELECTRONICS INC·Filed 2015·Granted Sep 6, 2016·5 cites·24 claims
- 4689US9306001B1Uniformly doped leakage current stopper to counter under channel leakage currents in bulk FinFET devicesIBM·Filed 2015·Granted Apr 5, 2016·6 cites·20 claims
- 4789US9012999B2Semiconductor device with an inclined source/drain and associated methodsLIU QING·Filed 2012·Granted Apr 21, 2015·10 cites·17 claims
- 4889US8828851B2Method to enable the formation of silicon germanium channel of FDSOI devices for PFET threshold voltage engineeringLOUBET NICOLAS·Filed 2012·Granted Sep 9, 2014·15 cites·17 claims
- 4988US10026830B2Tunneling field effect transistor (TFET) having a semiconductor fin structureST MICROELECTRONICS INC·Filed 2015·Granted Jul 17, 2018·7 cites·29 claims
- 5088US9865710B2FinFET having a non-uniform finST MICROELECTRONICS INC·Filed 2015·Granted Jan 9, 2018·5 cites·21 claims
Showing the top 50 of 227 patent records by PatentIndex Score.
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