Inventor · disambiguated record
Sarathy Jayakumar
Also filed as: JAYAKUMAR SARATHY
43 granted patents·16 pending applications·94 citations·filing 2007–2025
97Inventor score
Top patents by PatentIndex Score
59 records- 0195US11048512B1Apparatus and method to identify the source of an interruptINTEL CORP·Filed 2020·Granted Jun 29, 2021·4 cites·24 claims
- 0293US8751864B2Controlling memory redundancy in a systemINTEL CORP·Filed 2013·Granted Jun 10, 2014·19 cites·19 claims
- 0392US10474596B2Providing dedicated resources for a system management mode of a processorINTEL CORP·Filed 2015·Granted Nov 12, 2019·10 cites·23 claims
- 0487US9594570B2Computing platform with interface based error injectionINTEL CORP·Filed 2012·Granted Mar 14, 2017·5 cites·19 claims
- 0586US12008359B2Update of boot code handlersINTEL CORP·Filed 2020·Granted Jun 11, 2024·2 cites·20 claims
- 0686US9454380B2Computing platform performance management with RAS servicesINTEL CORP·Filed 2012·Granted Sep 27, 2016·4 cites·16 claims
- 0784US10649690B2Fast memory initializationINTEL CORP·Filed 2015·Granted May 12, 2020·4 cites·24 claims
- 0883US9645829B2Techniques to communicate with a controller for a non-volatile dual in-line memory moduleINTEL CORP·Filed 2014·Granted May 9, 2017·9 cites·25 claims
- 0980US8407516B2Controlling memory redundancy in a systemSWANSON ROBERT C·Filed 2009·Granted Mar 26, 2013·8 cites·21 claims
- 1078US11327918B2CPU hot-swappingINTEL CORP·Filed 2018·Granted May 10, 2022·3 cites·22 claims
- 1176US8650414B2Logic device having status and control registers for recording the status and controlling the operation of memory slots such that each memory slot is identified using a bus address and port numberJAYAKUMAR SARATHY·Filed 2010·Granted Feb 11, 2014·5 cites·23 claims
- 1275US11900115B2Apparatus and method to identify the source of an interruptINTEL CORP·Filed 2023·Granted Feb 13, 2024·0 cites·7 claims
- 1373US10007528B2Computing platform interface with memory managementINTEL CORP·Filed 2012·Granted Jun 26, 2018·1 cites·19 claims
- 1472US10387072B2Systems and method for dynamic address based mirroringINTEL CORP·Filed 2016·Granted Aug 20, 2019·2 cites·20 claims
- 1572US9411667B2Recovery after input/ouput error-containment eventsJAYAKUMAR SARATHY·Filed 2012·Granted Aug 9, 2016·3 cites·27 claims
- 1669US11614939B2Apparatus and method to identify the source of an interruptINTEL CORP·Filed 2021·Granted Mar 28, 2023·0 cites·22 claims
- 1769US10514931B2Computing platform interface with memory managementINTEL CORP·Filed 2018·Granted Dec 24, 2019·0 cites·20 claims
- 1869US10162761B2Apparatus and method for system physical address to memory module address translationINTEL CORP·Filed 2017·Granted Dec 25, 2018·1 cites·24 claims
- 1969US10019354B2Apparatus and method for fast cache flushing including determining whether data is to be stored in nonvolatile memoryINTEL CORP·Filed 2013·Granted Jul 10, 2018·2 cites·7 claims
- 2069US8448024B2Firmware assisted error handling schemeKUMAR MOHAN·Filed 2007·Granted May 21, 2013·4 cites·24 claims
- 2168US10929232B2Delayed error processingINTEL CORP·Filed 2017·Granted Feb 23, 2021·1 cites·25 claims
- 2268US9612887B2Firmware-related event notificationINTEL CORP·Filed 2015·Granted Apr 4, 2017·1 cites·20 claims
- 2368US7725637B2Methods and apparatus for generating system management interruptsINTEL CORP·Filed 2007·Granted May 25, 2010·4 cites·11 claims
- 2466US2025335238A1Interrupt messaging technologiesINTEL CORP·Filed 2025·Application pending·0 cites
- 2565US10732986B2Computing platform with interface based error injectionINTEL CORP·Filed 2017·Granted Aug 4, 2020·0 cites·25 claims
- 2662US11068339B2Read from memory instructions, processors, methods, and systems, that do not take exception on defective dataINTEL CORP·Filed 2019·Granted Jul 20, 2021·0 cites·20 claims
- 2761US11074204B2Arbiter based serialization of processor system management interrupt eventsINTEL CORP·Filed 2019·Granted Jul 27, 2021·0 cites·16 claims
- 2861US10372491B2Execution context migration method and apparatusINTEL CORP·Filed 2015·Granted Aug 6, 2019·1 cites·20 claims
- 2960US9311138B2System management interrupt handling for multi-core processorsJAYAKUMAR SARATHY·Filed 2013·Granted Apr 12, 2016·1 cites·17 claims
- 3059US10078522B2Computing platform interface with memory managementINTEL CORP·Filed 2012·Granted Sep 18, 2018·0 cites·24 claims
- 3157US12379934B2Decoupling silicon initialization and bootloader by providing silicon initialization serviceINTEL CORP·Filed 2021·Granted Aug 5, 2025·0 cites·22 claims
- 3257US12223308B2Methods and apparatus to perform a pseudo-S3 protocol to update firmware and/or activate new firmware with a warm resetINTEL CORP·Filed 2020·Granted Feb 11, 2025·0 cites·20 claims
- 3357US10445154B2Firmware-related event notificationINTEL CORP·Filed 2017·Granted Oct 15, 2019·0 cites·23 claims
- 3456US12399780B2Firmware first handling of a machine check eventINTEL CORP·Filed 2022·Granted Aug 26, 2025·0 cites·20 claims
- 3555US10296416B2Read from memory instructions, processors, methods, and systems, that do not take exception on defective dataINTEL CORP·Filed 2016·Granted May 21, 2019·0 cites·22 claims
- 3654US11809878B2Deployment of BIOS to operating system data exchangeINTEL CORP·Filed 2020·Granted Nov 7, 2023·0 cites·24 claims
- 3753US8762778B2Firmware assisted error handling schemeINTEL CORP·Filed 2013·Granted Jun 24, 2014·0 cites·24 claims
- 3852US11138072B2Protected runtime modeINTEL CORP·Filed 2017·Granted Oct 5, 2021·0 cites·24 claims
- 3952US8402186B2Bi-directional handshake for advanced reliabilty availability and serviceabilityJAYAKUMAR SARATHY·Filed 2009·Granted Mar 19, 2013·0 cites·22 claims
- 4052US2024320002A1Apparatus and Method for an Efficient System Management ModeINTEL CORP·Filed 2023·Application pending·0 cites
- 4151US11307996B2Hardware unit for reverse translation in a processorINTEL CORP·Filed 2018·Granted Apr 19, 2022·0 cites·20 claims
- 4251US2017286333A1Arbiter Based Serialization of Processor System Management Interrupt EventsINTEL CORP·Filed 2016·Application pending·0 cites
- 4350US12130924B2Seamless SMM global driver update base on SMM root of trustINTEL CORP·Filed 2020·Granted Oct 29, 2024·0 cites·20 claims
- 4449US2016188414A1Fault tolerant automatic dual in-line memory module refreshINTEL CORP·Filed 2014·Application pending·0 cites
- 4549US2022350500A1Embedded controller and memory to store memory error informationINTEL CORP·Filed 2022·Application pending·0 cites
- 4648US11222119B2Technologies for secure and efficient native code invocation for firmware servicesINTEL CORP·Filed 2019·Granted Jan 11, 2022·0 cites·25 claims
- 4747US2024184621A1Firmware Apparatus, Device, Method and Computer ProgramINTEL CORP·Filed 2021·Application pending·0 cites
- 4847US2024241805A1Apparatus, computer-readable medium, and method for increasing memory error handling accuracyINTEL CORP·Filed 2021·Application pending·0 cites
- 4946US12164906B2Modular microcode (uCode) patch method to support runtime persistent updateINTEL CORP·Filed 2020·Granted Dec 10, 2024·0 cites·20 claims
- 5046US11941391B2Microcode(uCode) hot-upgrade method for bare metal cloud deploymentINTEL CORP·Filed 2020·Granted Mar 26, 2024·0 cites·17 claims
Showing the top 50 of 59 patent records by PatentIndex Score.
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