Inventor · disambiguated record
Gerald W. Jones
Also filed as: JONES GERALD W · JONES GERALD WALTER
28 granted patents·655 citations·filing 1986–2003
97Inventor score
Files withIBM28
Top patents by PatentIndex Score
28 records- 0195US6373717B1Electronic package with high density interconnect layerIBM·Filed 2000·Granted Apr 16, 2002·97 cites·16 claims
- 0294US5268260APhotoresist develop and strip solvent compositions and method for their useIBM·Filed 1991·Granted Dec 7, 1993·102 cites·3 claims
- 0385US6829823B2Method of making a multi-layered interconnect structureIBM·Filed 2002·Granted Dec 14, 2004·31 cites·25 claims
- 0481US5460921AHigh density pattern template: materials and processes for the application of conductive pastesIBM·Filed 1993·Granted Oct 24, 1995·44 cites·15 claims
- 0572US6720502B1Integrated circuit structureIBM·Filed 2000·Granted Apr 13, 2004·17 cites·12 claims
- 0672US5599747AMethod of making circuitized substrateIBM·Filed 1995·Granted Feb 4, 1997·31 cites·15 claims
- 0771US6593534B2Printed wiring board structure with z-axis interconnectionsIBM·Filed 2001·Granted Jul 15, 2003·17 cites·45 claims
- 0871US5789121AHigh density template: materials and processes for the application of conductive pastesIBM·Filed 1997·Granted Aug 4, 1998·28 cites·5 claims
- 0970US6127097APhotoresist develop and strip solvent compositions and method for their useIBM·Filed 1997·Granted Oct 3, 2000·27 cites·5 claims
- 1068US6066889AMethods of selectively filling aperturesIBM·Filed 1998·Granted May 23, 2000·30 cites·10 claims
- 1168US4697923AMethod for visual inspection of multilayer printed circuit boardsIBM·Filed 1986·Granted Oct 6, 1987·28 cites·5 claims
- 1266US6739048B2Process of fabricating a circuitized structureIBM·Filed 2000·Granted May 25, 2004·12 cites·5 claims
- 1366US6376158B1Methods for selectively filling aperturesIBM·Filed 2000·Granted Apr 23, 2002·11 cites·8 claims
- 1466US6252307B1Structure for preventing adhesive bleed onto surfacesIBM·Filed 2000·Granted Jun 26, 2001·12 cites·12 claims
- 1566US5866237AOrganic electronic package and method of applying palladium-tin seed layer theretoIBM·Filed 1996·Granted Feb 2, 1999·27 cites·17 claims
- 1665US4956197APlasma conditioning of a substrate for electroless platingIBM·Filed 1988·Granted Sep 11, 1990·23 cites·15 claims
- 1760US6887779B2Integrated circuit structureIBM·Filed 2003·Granted May 3, 2005·8 cites·20 claims
- 1860US6447914B1Method of uniformly depositing seed and a conductor and the resultant printed circuit structureIBM·Filed 2000·Granted Sep 10, 2002·3 cites·15 claims
- 1958US5997997AMethod for reducing seed deposition in electroless platingIBM·Filed 1997·Granted Dec 7, 1999·15 cites·18 claims
- 2052US6025057AOrganic electronic package and method of applying palladium-tin seed layer theretoIBM·Filed 1997·Granted Feb 15, 2000·15 cites·5 claims
- 2151US6136513AMethod of uniformly depositing seed and a conductor and the resultant printed circuit structureIBM·Filed 1998·Granted Oct 24, 2000·12 cites·21 claims
- 2251US6131279AIntegrated manufacturing packaging processIBM·Filed 1998·Granted Oct 17, 2000·14 cites·22 claims
- 2350US6680440B1Circuitized structures produced by the methods of electroless platingIBM·Filed 1998·Granted Jan 20, 2004·14 cites·20 claims
- 2449US6420253B2Method for preventing adhesive bleed onto surfacesIBM·Filed 2001·Granted Jul 16, 2002·3 cites·13 claims
- 2549US5935652AMethod for reducing seed deposition in electroless platingIBM·Filed 1998·Granted Aug 10, 1999·11 cites·22 claims
- 2644US5922517AMethod of preparing a substrate surface for conformal platingIBM·Filed 1996·Granted Jul 13, 1999·9 cites·9 claims
- 2743US6027858AProcess for tenting PTH's with PID dry filmIBM·Filed 1997·Granted Feb 22, 2000·11 cites·23 claims
- 2836US5905018AMethod of preparing a substrate surface for conformal platingIBM·Filed 1997·Granted May 18, 1999·3 cites·11 claims
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