Inventor · disambiguated record
Sharon Graif
Also filed as: GRAIF SHARON
25 granted patents·22 pending applications·32 citations·filing 2010–2022
92Inventor score
Top patents by PatentIndex Score
47 records- 0191US11366508B1Extended current limit message latency aware performance mitigationQUALCOMM INC·Filed 2021·Granted Jun 21, 2022·4 cites·30 claims
- 0290US10496562B1Low latency virtual general purpose input/output over I3CQUALCOMM INC·Filed 2018·Granted Dec 3, 2019·8 cites·30 claims
- 0386US10725949B2Slave-to-slave direct communicationQUALCOMM INC·Filed 2018·Granted Jul 28, 2020·5 cites·17 claims
- 0485US10572439B1I3C read from long latency devicesQUALCOMM INC·Filed 2019·Granted Feb 25, 2020·5 cites·30 claims
- 0582US11520729B2I2C bus architecture using shared clock and dedicated data linesQUALCOMM INC·Filed 2021·Granted Dec 6, 2022·1 cites·30 claims
- 0681US11522738B1High-speed communication link with self-aligned scramblingQUALCOMM INC·Filed 2021·Granted Dec 6, 2022·1 cites·28 claims
- 0778US11704086B2Fast activation during wake up in an audio systemQUALCOMM INC·Filed 2020·Granted Jul 18, 2023·1 cites·20 claims
- 0877US10713199B2High bandwidth soundwire master with multiple primary data lanesQUALCOMM INC·Filed 2018·Granted Jul 14, 2020·2 cites·30 claims
- 0973US10684981B2Fast termination of multilane single data rate transactionsQUALCOMM INC·Filed 2019·Granted Jun 16, 2020·1 cites·29 claims
- 1069US11843486B2High-speed communication link with self-aligned scramblingQUALCOMM INC·Filed 2022·Granted Dec 12, 2023·0 cites·23 claims
- 1169US8422516B2Scalable DigRF architectureREINHARDT STEFFEN·Filed 2010·Granted Apr 16, 2013·3 cites·16 claims
- 1260US9524264B2Generating combined bus clock signals using asynchronous master device reference clocks in shared bus systems, and related methods, devices, and computer-readable mediaQUALCOMM INC·Filed 2014·Granted Dec 20, 2016·1 cites·25 claims
- 1359US10877088B2In-system structural testing of a system-on-chip (SoC) using a peripheral interface portQUALCOMM INC·Filed 2019·Granted Dec 29, 2020·0 cites·17 claims
- 1453US11064295B2Scrambling data-port audio in SOUNDWIRE systemsQUALCOMM INC·Filed 2019·Granted Jul 13, 2021·0 cites·5 claims
- 1553US11030133B2Aggregated in-band interrupt based on responses from slave devices on a serial data bus lineQUALCOMM INC·Filed 2019·Granted Jun 8, 2021·0 cites·20 claims
- 1652US11360916B2Group slave identifier time-multiplexed acknowledgment for system power management interfaceQUALCOMM INC·Filed 2020·Granted Jun 14, 2022·0 cites·30 claims
- 1751US11347667B2Bus controller and related methodsQUALCOMM INC·Filed 2019·Granted May 31, 2022·0 cites·30 claims
- 1851US11010327B2I3C point to pointQUALCOMM INC·Filed 2019·Granted May 18, 2021·0 cites·24 claims
- 1951US10678723B2Urgent in-band interrupts on an I3C busQUALCOMM INC·Filed 2018·Granted Jun 9, 2020·0 cites·30 claims
- 2051US10560780B2Phase alignment in an audio busQUALCOMM INC·Filed 2019·Granted Feb 11, 2020·0 cites·17 claims
- 2151US10511397B2Virtual general purpose input/output (GPIO) (VGI) over a time division multiplex (TDM) busQUALCOMM INC·Filed 2018·Granted Dec 17, 2019·0 cites·24 claims
- 2247US11354266B2Hang correction in a power management interface busQUALCOMM INC·Filed 2020·Granted Jun 7, 2022·0 cites·23 claims
- 2347US11327922B2Bus ownership for a system power management interface (SPMI) busQUALCOMM INC·Filed 2020·Granted May 10, 2022·0 cites·26 claims
- 2447US2020201808A1Time-division multiplexing (tdm) data transfer on serial interfacesQUALCOMM INC·Filed 2019·Application pending·0 cites
- 2546US12164460B2Providing acknowledgements for system power management interfaceQUALCOMM INC·Filed 2021·Granted Dec 10, 2024·0 cites·24 claims
- 2645US10733121B2Latency optimized I3C virtual GPIO with configurable operating mode and device skipQUALCOMM INC·Filed 2019·Granted Aug 4, 2020·0 cites·22 claims
- 2745US2021152620A1Isochronous audio transmissionQUALCOMM INC·Filed 2019·Application pending·0 cites
- 2845US2019354502A1Lightweight universal serial bus (usb) compound device implementationQUALCOMM INC·Filed 2019·Application pending·0 cites
- 2945US2019171609A1Non-destructive outside device alerts for multi-lane i3cQUALCOMM INC·Filed 2018·Application pending·0 cites
- 3045US2019250876A1Split read transactions over an audio communication busQUALCOMM INC·Filed 2019·Application pending·0 cites
- 3144US2021050868A1Techniques for concurrent multi-rat reception based on switched diversityQUALCOMM INC·Filed 2020·Application pending·0 cites
- 3244US2022129398A1Tunneling over universal serial bus (usb) sideband channelQUALCOMM INC·Filed 2020·Application pending·0 cites
- 3344US2019356412A1Fast termination of multilane double data rate transactionsQUALCOMM INC·Filed 2019·Application pending·0 cites
- 3444US2020119902A1Payload transport on audio buses for simple pulse division multiplexed (pdm) devicesQUALCOMM INC·Filed 2019·Application pending·0 cites
- 3543US2020019523A1Delayed bank switch commands in an audio systemQUALCOMM INC·Filed 2018·Application pending·0 cites
- 3643US2019018818A1Accelerated i3c stop initiated by a third partyQUALCOMM INC·Filed 2018·Application pending·0 cites
- 3743US2019095273A1Parity bits location on i3c multilane busQUALCOMM INC·Filed 2018·Application pending·0 cites
- 3841US2018357121A1Error correction calculation upon serial bus abortQUALCOMM INC·Filed 2018·Application pending·0 cites
- 3938US2020201804A1I3c device timing adjustment to accelerate in-band interruptsQUALCOMM INC·Filed 2018·Application pending·0 cites
- 4038US2022019548A1Nested commands for radio frequency front end (rffe) busQUALCOMM INC·Filed 2020·Application pending·0 cites
- 4135US2020065274A1Always-on ibi handlingQUALCOMM INC·Filed 2018·Application pending·0 cites
- 4235US2019258486A1Event-based branching for serial protocol processor-based devicesQUALCOMM INC·Filed 2019·Application pending·0 cites
- 4334US2019108149A1I3c in-band interrupts directed to multiple execution environmentsQUALCOMM INC·Filed 2017·Application pending·0 cites
- 4434US2019129464A1I3c clock generatorQUALCOMM INC·Filed 2018·Application pending·0 cites
- 4533US2018285292A1System and method of sending data via additional secondary data lines on a busQUALCOMM INC·Filed 2018·Application pending·0 cites
- 4633US2018196681A1Selective processor wake-up in an electronic deviceQUALCOMM INC·Filed 2017·Application pending·0 cites
- 4732US2020293081A1Systems and methods for power conservation on an audio bus through clock manipulationQUALCOMM INC·Filed 2019·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →