Inventor · disambiguated record
Owen S. Bair
Also filed as: BAIR OWEN S
9 granted patents·1,088 citations·filing 1991–1998
93Inventor score
Files withLSI LOGIC CORP9
Top patents by PatentIndex Score
9 records- 0197US5572437AMethod and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing modelsLSI LOGIC CORP·Filed 1994·Granted Nov 5, 1996·149 cites·17 claims
- 0296US5933356AMethod and system for creating and verifying structural logic model of electronic design from behavioral description, including generation of logic and timing modelsLSI LOGIC CORP·Filed 1996·Granted Aug 3, 1999·263 cites·13 claims
- 0393US5577050AMethod and apparatus for configurable build-in self-repairing of ASIC memories designLSI LOGIC CORP·Filed 1994·Granted Nov 19, 1996·156 cites·17 claims
- 0492US5764878ABuilt-in self repair system for embedded memoriesLSI LOGIC CORP·Filed 1996·Granted Jun 9, 1998·138 cites·13 claims
- 0590US5463563AAutomatic logic model generation from schematic data baseLSI LOGIC CORP·Filed 1993·Granted Oct 31, 1995·70 cites·4 claims
- 0690US5278769AAutomatic logic model generation from schematic data baseLSI LOGIC CORP·Filed 1991·Granted Jan 11, 1994·143 cites·5 claims
- 0780US6065134AMethod for repairing an ASIC memory with redundancy row and input/output linesLSI LOGIC CORP·Filed 1998·Granted May 16, 2000·52 cites·8 claims
- 0871US5898595AAutomated generation of megacells in an integrated circuit design systemLSI LOGIC CORP·Filed 1995·Granted Apr 27, 1999·79 cites·16 claims
- 0955US6066178AAutomated design method and system for synthesizing digital multipliersLSI LOGIC CORP·Filed 1996·Granted May 23, 2000·38 cites·18 claims
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