Inventor · disambiguated record
Steven Paul Vanderwiel
Also filed as: VANDERWIEL STEVEN P · VANDERWIEL STEVEN PAUL
13 granted patents·5 pending applications·399 citations·filing 2002–2015
92Inventor score
Top patents by PatentIndex Score
18 records- 0198US8736068B2Hybrid bonding techniques for multi-layer semiconductor stacksBARTLEY GERALD K·Filed 2012·Granted May 27, 2014·215 cites·11 claims
- 0295US9495498B2Universal inter-layer interconnect for multi-layer semiconductor stacksBARTLEY GERALD K·Filed 2012·Granted Nov 15, 2016·19 cites·16 claims
- 0392US8445918B2Thermal enhancement for multi-layer semiconductor stacksBARTLEY GERALD K·Filed 2010·Granted May 21, 2013·17 cites·18 claims
- 0492US6820174B2Multi-processor computer system using partition group directories to maintain cache coherenceIBM·Filed 2002·Granted Nov 16, 2004·98 cites·31 claims
- 0591US8293578B2Hybrid bonding techniques for multi-layer semiconductor stacksBARTLEY GERALD K·Filed 2010·Granted Oct 23, 2012·11 cites·10 claims
- 0684US8386690B2On-chip networks for flexible three-dimensional chip integrationIBM·Filed 2009·Granted Feb 26, 2013·14 cites·18 claims
- 0777US7826399B2Structure for preventing starvation in a slotted ring data communications networkIBM·Filed 2008·Granted Nov 2, 2010·7 cites·17 claims
- 0873US8330489B2Universal inter-layer interconnect for multi-layer semiconductor stacksBARTLEY GERALD K·Filed 2009·Granted Dec 11, 2012·4 cites·22 claims
- 0972US7760669B2Method and apparatus for preventing starvation in a slotted ring data communications networkIBM·Filed 2006·Granted Jul 20, 2010·5 cites·14 claims
- 1070US9817612B2High-performance hash joins using memory with extensive internal parallelismIBM·Filed 2014·Granted Nov 14, 2017·2 cites·12 claims
- 1168US8127079B2Intelligent cache injectionHEIL TIMOTHY H·Filed 2009·Granted Feb 28, 2012·4 cites·8 claims
- 1266US9811287B2High-performance hash joins using memory with extensive internal parallelismIBM·Filed 2015·Granted Nov 7, 2017·1 cites·6 claims
- 1362US7512739B2Updating a node-based cache LRU treeIBM·Filed 2006·Granted Mar 31, 2009·2 cites·5 claims
- 1451US2013011968A1Hybrid bonding techniques for multi-layer semiconductor stacksIBM·Filed 2012·Application pending·0 cites
- 1550US2012198406A1Universal inter-layer interconnect for multi-layer semiconductor stacksBARTLEY GERALD K·Filed 2012·Application pending·0 cites
- 1642US2007094450A1Multi-level cache architecture having a selective victim cacheIBM·Filed 2005·Application pending·0 cites
- 1741US2008130667A1Distributed arbitration mechanism for ring networksIBM·Filed 2006·Application pending·0 cites
- 1835US2012124291A1Secondary Cache Memory With A Counter For Determining Whether to Replace Cached DataACHILLES HEATHER D·Filed 2010·Application pending·0 cites
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →