Inventor · disambiguated record
Greg Maturi
Also filed as: MATURI GREG
14 granted patents·1 pending application·1,004 citations·filing 1994–2012
95Inventor score
Top patents by PatentIndex Score
15 records- 0198US5559999AMPEG decoding system including tag list for associating presentation time stamps with encoded data unitsLSI LOGIC CORP·Filed 1994·Granted Sep 24, 1996·271 cites·26 claims
- 0297US5960006AMPEG decoding system adjusting the presentation in a predetermined manner based on the actual and requested decoding timeLSI LOGIC CORP·Filed 1996·Granted Sep 28, 1999·286 cites·34 claims
- 0392US5905768AMPEG audio synchronization system using subframe skip and repeatLSI LOGIC CORP·Filed 1996·Granted May 18, 1999·168 cites·22 claims
- 0479US5588029AMPEG audio synchronization system using subframe skip and repeatLSI LOGIC CORP·Filed 1995·Granted Dec 24, 1996·63 cites·22 claims
- 0578US7320037B1Method and apparatus for packet segmentation, enqueuing and queue servicing for multiple network processor architectureALTERA CORP·Filed 2002·Granted Jan 15, 2008·35 cites·20 claims
- 0675US7206857B1Method and apparatus for a network processor having an architecture that supports burst writes and/or readsALTERA CORP·Filed 2002·Granted Apr 17, 2007·21 cites·24 claims
- 0773US5694332AMPEG audio decoding system with subframe input bufferingLSI LOGIC CORP·Filed 1994·Granted Dec 2, 1997·62 cites·29 claims
- 0871US5621772AHysteretic synchronization system for MPEG audio frame decoderLSI LOGIC CORP·Filed 1995·Granted Apr 15, 1997·37 cites·18 claims
- 0969US7339943B1Apparatus and method for queuing flow management between input, intermediate and output queuesALTERA CORP·Filed 2002·Granted Mar 4, 2008·13 cites·21 claims
- 1055US7606248B1Method and apparatus for using multiple network processors to achieve higher performance networking applicationsALTERA CORP·Filed 2002·Granted Oct 20, 2009·4 cites·54 claims
- 1153US5982830AHysteretic synchronization system for MPEG audio frame decoderLSI LOGIC CORP·Filed 1997·Granted Nov 9, 1999·26 cites·29 claims
- 1252US5528183ASerial clock synchronization circuitLSI LOGIC CORP·Filed 1994·Granted Jun 18, 1996·10 cites·14 claims
- 1350US7336669B1Mechanism for distributing statistics across multiple elementsALTERA CORP·Filed 2002·Granted Feb 26, 2008·1 cites·17 claims
- 1442US2014307011A1Systems and Methods for Display Systems Having Improved Power ProfilesDOLBY LAB LICENSING CORP·Filed 2012·Application pending·0 cites
- 1534US5696462ASerial clock synchronization circuitLSI LOGIC CORP·Filed 1996·Granted Dec 9, 1997·7 cites·16 claims
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