Inventor · disambiguated record
Robindranath Banerjee
Also filed as: BANERJEE ROBINDRANATH
9 granted patents·65 citations·filing 2000–2018
86Inventor score
Top patents by PatentIndex Score
9 records- 0181US6537923B1Process for forming integrated circuit structure with low dielectric constant material between closely spaced apart metal linesLSI LOGIC CORP·Filed 2000·Granted Mar 25, 2003·26 cites·17 claims
- 0268US6621404B1Low temperature coefficient resistorLSI LOGIC CORP·Filed 2001·Granted Sep 16, 2003·14 cites·10 claims
- 0360US6495419B1Nonvolatile memory in CMOS process flowLSI LOGIC CORP·Filed 2000·Granted Dec 17, 2002·8 cites·18 claims
- 0458US6338992B1Programmable read only memory in CMOS process flowLSI LOGIC CORP·Filed 2000·Granted Jan 15, 2002·7 cites·18 claims
- 0555US6495881B1Programmable read only memory in CMOS process flowLSI LOGIC CORP·Filed 2001·Granted Dec 17, 2002·6 cites·2 claims
- 0653US11267095B2High throughput polishing system for workpiecesUTICA LEASECO LLC·Filed 2018·Granted Mar 8, 2022·0 cites·17 claims
- 0749US6960979B2Low temperature coefficient resistorLSI LOGIC CORP·Filed 2003·Granted Nov 1, 2005·4 cites·6 claims
- 0843US9950404B1High throughput polishing system for workpiecesFISHER STEPHEN M·Filed 2012·Granted Apr 24, 2018·0 cites·16 claims
- 0935US6482075B1Process for planarizing an isolation structure in a substrateLSI LOGIC CORP·Filed 2000·Granted Nov 19, 2002·0 cites·20 claims
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