Inventor · disambiguated record
Jonathan F. Churchill
Also filed as: CHURCHILL JONATHAN · CHURCHILL JONATHAN F
16 granted patents·413 citations·filing 1995–2004
94Inventor score
Top patents by PatentIndex Score
16 records- 0191US5570043AOvervoltage tolerant intergrated circuit output bufferCYPRESS SEMICONDUCTOR CORP·Filed 1995·Granted Oct 29, 1996·87 cites·16 claims
- 0286US6388927B1Direct bit line-bit line defect detection test mode for SRAMCYPRESS SEMICONDUCTOR CORP·Filed 2001·Granted May 14, 2002·52 cites·22 claims
- 0379US5936977AScan path circuitry including a programmable delay circuitCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Aug 10, 1999·40 cites·26 claims
- 0478US6286118B1Scan path circuitry including a programmable delay circuitCYPRESS SEMICONDUCTOR CORP·Filed 1998·Granted Sep 4, 2001·37 cites·20 claims
- 0576US5852579AMethod and circuit for preventing and/or inhibiting contention in a system employing a random access memoryCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Dec 22, 1998·37 cites·19 claims
- 0675US6115836AScan path circuitry for programming a variable clock pulse widthCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Sep 5, 2000·40 cites·25 claims
- 0775US6006347ATest mode features for synchronous pipelined memoriesCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Dec 21, 1999·38 cites·16 claims
- 0870US7126391B1Power on reset circuitsCYPRESS SEMICONDUCTOR CORP·Filed 2004·Granted Oct 24, 2006·15 cites·20 claims
- 0970US6981238B1Verification of integrated circuit designs using buffer controlCYPRESS SEMICONDUCTOR CORP·Filed 2002·Granted Dec 27, 2005·15 cites·8 claims
- 1068US5953285AScan path circuitry including an output register having a flow through modeCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Sep 14, 1999·28 cites·22 claims
- 1161US6392941B1Wordline and pseudo read stress test for SRAMCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted May 21, 2002·11 cites·20 claims
- 1243US6538485B1Dual tristate path output buffer controlCYPRESS SEMICONDUCTOR CORP·Filed 2001·Granted Mar 25, 2003·2 cites·22 claims
- 1343US5907255ADynamic voltage reference which compensates for process variationsCYPRESS SEMICONDUCTOR·Filed 1997·Granted May 25, 1999·8 cites·20 claims
- 1438US6288948B1Wired address compare circuit and methodCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Sep 11, 2001·2 cites·18 claims
- 1536US6724232B1Dual tristate path output buffer controlCYPRESS SEMICONDUCTOR CORP·Filed 2003·Granted Apr 20, 2004·0 cites·22 claims
- 1635US6404682B1Wired address compare circuit and methodCYPRESS SEMICONDUCTOR CORP·Filed 2001·Granted Jun 11, 2002·1 cites·20 claims
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