Inventor · disambiguated record
Trinh Huy Nguyen
Also filed as: NGUYEN TRINH · NGUYEN TRINH H · NGUYEN TRINH HUY · NGUYEN TRINH HUY H
21 granted patents·288 citations·filing 1991–2021
94Inventor score
Top patents by PatentIndex Score
21 records- 0194US9996294B2Dynamically managing a table of contentsIBM·Filed 2016·Granted Jun 12, 2018·21 cites·9 claims
- 0287US8966229B2Systems and methods for handling instructions of in-order and out-of-order execution queuesTRAN THANG M·Filed 2011·Granted Feb 24, 2015·10 cites·19 claims
- 0381US8145942B2Methods and systems for troubleshooting remote systems through recreation of remote system scenariosNGUYEN TRINH H·Filed 2010·Granted Mar 27, 2012·10 cites·19 claims
- 0481US8117618B2Forward progress mechanism for a multithreaded processorHOLLOWAY DAVID C·Filed 2007·Granted Feb 14, 2012·16 cites·20 claims
- 0578US5274646AExcessive error correction controlIBM·Filed 1991·Granted Dec 28, 1993·82 cites·24 claims
- 0677US9110656B2Systems and methods for handling instructions of in-order and out-of-order execution queuesTRAN THANG M·Filed 2011·Granted Aug 18, 2015·4 cites·17 claims
- 0776US7698353B2Floating point normalization and denormalizationFREESCALE SEMICONDUCTOR INC·Filed 2005·Granted Apr 13, 2010·9 cites·33 claims
- 0875US12118342B2Applying a code update to a target system from a personal communication deviceIBM·Filed 2021·Granted Oct 15, 2024·1 cites·17 claims
- 0974US10242078B2Data dump formatting utilizing dynamically created control structuresIBM·Filed 2016·Granted Mar 26, 2019·2 cites·17 claims
- 1071US10564874B2Dynamically managing a table of contentsIBM·Filed 2018·Granted Feb 18, 2020·1 cites·20 claims
- 1171US5740399AModified L1/L2 cache inclusion for aggressive prefetchIBM·Filed 1995·Granted Apr 14, 1998·63 cites·5 claims
- 1269US5758119ASystem and method for indicating that a processor has prefetched data into a primary cache and not into a secondary cacheIBM·Filed 1995·Granted May 26, 1998·55 cites·10 claims
- 1366US11163587B2Interface that enables streamlined user-friendly initiation/control of modifications and/or initial program loading (IPL) of a target systemIBM·Filed 2019·Granted Nov 2, 2021·1 cites·20 claims
- 1466US6973471B2Method and apparatus for implementing signed multiplication of operands having differing bit widths without sign extension of the multiplicandFREESCALE SEMICONDUCTOR INC·Filed 2002·Granted Dec 6, 2005·12 cites·20 claims
- 1557US11409759B2Data dump formatting utilizing dynamically created control structuresIBM·Filed 2019·Granted Aug 9, 2022·0 cites·20 claims
- 1656US9940903B2System and method for managing, publishing and manipulating data objectsNAJARIAN JOHN·Filed 2012·Granted Apr 10, 2018·1 cites·22 claims
- 1753US11775289B2Source code development interface for storage managementIBM·Filed 2021·Granted Oct 3, 2023·0 cites·18 claims
- 1848US9141391B2Data processing system with latency tolerance executionTRAN THANG M·Filed 2012·Granted Sep 22, 2015·0 cites·18 claims
- 1946US7805581B2Multiple address and arithmetic bit-mode data processing device and methods thereofFREESCALE SEMICONDUCTOR INC·Filed 2007·Granted Sep 28, 2010·0 cites·20 claims
- 2043US9135014B2Data processing system with latency tolerance executionTRAN THANG M·Filed 2012·Granted Sep 15, 2015·0 cites·17 claims
- 2139US10691549B2System managed facilitation of backup of dataset before deletionIBM·Filed 2018·Granted Jun 23, 2020·0 cites·20 claims
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