Inventor · disambiguated record
Wang Ling Goh
Also filed as: GOH WANG LING
18 granted patents·328 citations·filing 2000–2006
95Inventor score
Files withCHARTERED SEMICONDUCTOR MFG15CHARTERED SEMICONDUCTOR MANFAC1CHARTERED SEMICONDUCTORS MAUFA1LIM YEOW KHENG1
Top patents by PatentIndex Score
18 records- 0189US6380084B1Method to form high performance copper damascene interconnects by de-coupling via and metal line fillingCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Apr 30, 2002·59 cites·33 claims
- 0288US6376376B1Method to prevent CU dishing during damascene formationCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Apr 23, 2002·60 cites·29 claims
- 0387US6841847B23-D spiral stacked inductor on semiconductor materialCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Jan 11, 2005·41 cites·14 claims
- 0483US6558994B2Dual silicon-on-insulator device wafer dieCHARTERED SEMICONDUCTORS MAUFA·Filed 2001·Granted May 6, 2003·36 cites·13 claims
- 0580US6998682B2Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extensionCHARTERED SEMICONDUCTOR MFG·Filed 2005·Granted Feb 14, 2006·9 cites·22 claims
- 0679US6613652B2Method for fabricating SOI devices with option of incorporating air-gap feature for better insulation and performanceCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Sep 2, 2003·28 cites·33 claims
- 0778US6403484B1Method to achieve STI planarizationCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Jun 11, 2002·23 cites·20 claims
- 0868US6613649B2Method for buffer STI scheme with a hard mask layer as an oxidation barrierCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Sep 2, 2003·16 cites·21 claims
- 0966US6468880B1Method for fabricating complementary silicon on insulator devices using wafer bondingCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Oct 22, 2002·14 cites·14 claims
- 1060US7119010B2Integrated circuit with self-aligned line and via and manufacturing method thereforCHARTERED SEMICONDUCTOR MANFAC·Filed 2002·Granted Oct 10, 2006·10 cites·9 claims
- 1159US6905919B2Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extensionCHARTERED SEMICONDUCTOR MFG·Filed 2003·Granted Jun 14, 2005·8 cites·22 claims
- 1257US6849928B2Dual silicon-on-insulator device wafer dieCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Feb 1, 2005·6 cites·10 claims
- 1356US8766454B2Integrated circuit with self-aligned line and viaLIM YEOW KHENG·Filed 2006·Granted Jul 1, 2014·1 cites·10 claims
- 1456US7721414B2Method of manufacturing 3-D spiral stacked inductor on semiconductor materialCHARTERED SEMICONDUCTOR MFG·Filed 2004·Granted May 25, 2010·6 cites·10 claims
- 1551US6613648B1Shallow trench isolation using TEOS cap and polysilicon pullbackCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Sep 2, 2003·5 cites·15 claims
- 1651US6399471B1Assorted aluminum wiring design to enhance chip-level performance for deep sub-micron applicationCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Jun 4, 2002·4 cites·7 claims
- 1746US7060573B2Extended poly buffer STI schemeCHARTERED SEMICONDUCTOR MFG·Filed 2001·Granted Jun 13, 2006·2 cites·31 claims
- 1839US6472697B2Assorted aluminum wiring design to enhance chip-level performance for deep sub-micron applicationCHARTERED SEMICONDUCTOR MFG·Filed 2002·Granted Oct 29, 2002·0 cites·5 claims
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