Inventor · disambiguated record
Sachin Taneja
Also filed as: TANEJA SACHIN
3 granted patents·10 pending applications·0 citations·filing 2015–2024
40Inventor score
Top patents by PatentIndex Score
13 records- 0159US12368574B2Side-channel resistant multiplicatively masked encryption engine with zero-value attack detectionINTEL CORP·Filed 2023·Granted Jul 22, 2025·0 cites·20 claims
- 0252US12375271B2Method and apparatus for true random number generation within cryptographic hardwareNAT UNIV SINGAPORE·Filed 2021·Granted Jul 29, 2025·0 cites·20 claims
- 0352US2025219816A1Method and apparatus to reduce rejection rate of integers generated by a random number generatorINTEL CORP·Filed 2023·Application pending·0 cites
- 0451US2025112772A1On-die key generator for fully-homomorphic encryption relinearization public keysINTEL CORP·Filed 2023·Application pending·0 cites
- 0551US2025202699A1Modular Exponentiation Hardware Accelerator with Unconstrained Operands for Public Key EncryptionINTEL CORP·Filed 2023·Application pending·0 cites
- 0651US2025007687A1Fully homomorphic encryptionINTEL CORP·Filed 2023·Application pending·0 cites
- 0750US2025211435A1Configurable variable-word size xorshift random number generatorINTEL CORP·Filed 2023·Application pending·0 cites
- 0850US2025005102A1Techniques for twiddle factor generation for number-theoretic-transform and inverse-number-theoretic-transform computationsINTEL CORP·Filed 2024·Application pending·0 cites
- 0949US2025005100A1Techniques for contention-free routing for number-theoretic- transform and inverse-number-theoretic-transform computations routed through a parallel processing deviceINTEL CORP·Filed 2023·Application pending·0 cites
- 1049US2025007688A1Reconfigurable compute circuitry to perform fully homomorphic encryption (fhe) to map unconstrained powers-of-2 fhe polynomialsINTEL CORP·Filed 2023·Application pending·0 cites
- 1148US2025005101A1Techniques for twiddle factor generation for number-theoretic- transrom and inverse-number-theoretic-tranform computationsINTEL CORP·Filed 2023·Application pending·0 cites
- 1240US2024078087A1Method and apparatus for unified dynamic and/or multibit static entropy generation inside embedded memoryNAT UNIV SINGAPORE·Filed 2021·Application pending·0 cites
- 1323US9583208B2Sensing scheme for high speed memory circuits with single ended sensingSYNOPSYS INC·Filed 2015·Granted Feb 28, 2017·0 cites·20 claims
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