Inventor · disambiguated record
Kushagra Vaid
Also filed as: VAID KUSHAGRA · VAID KUSHAGRA V · VAID KUSHAGRA VIRENDRAKUMAR
37 granted patents·8 pending applications·469 citations·filing 1998–2016
98Inventor score
Top patents by PatentIndex Score
45 records- 0192US9779249B2Launching a secure kernel in a multiprocessor systemINTEL CORP·Filed 2016·Granted Oct 3, 2017·5 cites·20 claims
- 0291US8321630B1Application-transparent hybridized caching for high-performance storageVAID KUSHAGRA·Filed 2010·Granted Nov 27, 2012·16 cites·18 claims
- 0389US8161280B2Launching a secure kernel in a multiprocessor systemWILSON JOHN H·Filed 2010·Granted Apr 17, 2012·8 cites·19 claims
- 0488US8533514B2Power-capping based on UPS capacityROGERS HARRY R·Filed 2011·Granted Sep 10, 2013·20 cites·20 claims
- 0588US6598154B1Precoding branch instructions to reduce branch-penalty in pipelined processorsINTEL CORP·Filed 1998·Granted Jul 22, 2003·145 cites·30 claims
- 0687US8261266B2Deploying a virtual machine having a virtual hardware configuration matching an improved hardware profile with respect to execution of an applicationPIKE ROBERT·Filed 2009·Granted Sep 4, 2012·21 cites·20 claims
- 0786US7770005B2Launching a secure kernel in a multiprocessor systemINTEL CORP·Filed 2007·Granted Aug 3, 2010·8 cites·16 claims
- 0886US7721148B2Method and apparatus for redirection of machine check interrupts in multithreaded systemsINTEL CORP·Filed 2006·Granted May 18, 2010·17 cites·23 claims
- 0983US7984248B2Transaction based shared data operations in a multiprocessor environmentINTEL CORP·Filed 2004·Granted Jul 19, 2011·27 cites·35 claims
- 1081US8984265B2Server active management technology (AMT) assisted secure bootVAID KUSHAGRA·Filed 2007·Granted Mar 17, 2015·10 cites·12 claims
- 1176US7426648B2Global and pseudo power state management for multiple processing elementsINTEL CORP·Filed 2004·Granted Sep 16, 2008·23 cites·25 claims
- 1276US7254676B2Processor cache memory as RAM for execution of boot codeINTEL CORP·Filed 2002·Granted Aug 7, 2007·21 cites·30 claims
- 1375US8176266B2Transaction based shared data operations in a multiprocessor environmentKOTTAPALLI SAILESH·Filed 2010·Granted May 8, 2012·3 cites·9 claims
- 1475US7725713B2Launching a secure kernel in a multiprocessor systemINTEL CORP·Filed 2007·Granted May 25, 2010·3 cites·17 claims
- 1574US9213865B2Launching a secure kernel in a multiprocessor systemINTEL CORP·Filed 2014·Granted Dec 15, 2015·1 cites·19 claims
- 1672US7774600B2Launching a secure kernel in a multiprocessor systemINTEL CORP·Filed 2007·Granted Aug 10, 2010·2 cites·15 claims
- 1772US6112295AHigh frequency pipeline decoupling queue with non-overlapping read and write signals within a single clock cycleINTEL CORP·Filed 1998·Granted Aug 29, 2000·67 cites·27 claims
- 1871US8458412B2Transaction based shared data operations in a multiprocessor environmentKOTTAPALLI SAILESH·Filed 2011·Granted Jun 4, 2013·2 cites·16 claims
- 1971US7849327B2Technique to virtualize processor input/output resourcesLEUNG HIN L·Filed 2005·Granted Dec 7, 2010·8 cites·9 claims
- 2070US8135723B2Leveraging low-latency memory accessVAID KUSHAGRA V·Filed 2008·Granted Mar 13, 2012·7 cites·20 claims
- 2170US7698552B2Launching a secure kernel in a multiprocessor systemINTEL CORP·Filed 2004·Granted Apr 13, 2010·7 cites·11 claims
- 2266US7360103B2P-state feedback to operating system with hardware coordinationINTEL CORP·Filed 2004·Granted Apr 15, 2008·14 cites·48 claims
- 2364US7587639B2System and method for error injection using a flexible program interface fieldINTEL CORP·Filed 2004·Granted Sep 8, 2009·10 cites·80 claims
- 2462US9507952B2Launching a secure kernel in a multiprocessor systemINTEL CORP·Filed 2015·Granted Nov 29, 2016·0 cites·20 claims
- 2562US9436517B2Reliability-aware application schedulingMICROSOFT CORP·Filed 2012·Granted Sep 6, 2016·1 cites·20 claims
- 2659US8874906B2Launching a secure kernel in a multiprocessor systemINTEL CORP·Filed 2013·Granted Oct 28, 2014·0 cites·16 claims
- 2757US8464048B2Launching a secure kernel in a multiprocessor systemWILSON JOHN H·Filed 2012·Granted Jun 11, 2013·0 cites·19 claims
- 2856US7757081B2Launching a secure kernel in a multiprocessor systemINTEL CORP·Filed 2007·Granted Jul 13, 2010·0 cites·21 claims
- 2955US10664166B2Application-transparent hybridized caching for high-performance storageMICROSOFT TECHNOLOGY LICENSING LLC·Filed 2015·Granted May 26, 2020·0 cites·20 claims
- 3054US9110783B1Application-transparent hybridized caching for high-performance storageVAID KUSHAGRA·Filed 2012·Granted Aug 18, 2015·0 cites·9 claims
- 3154US8250364B2Launching a secure kernel in a multiprocessor systemWILSON JOHN H·Filed 2010·Granted Aug 21, 2012·0 cites·18 claims
- 3254US7353433B2Poisoned error signaling for proactive OS recoveryINTEL CORP·Filed 2003·Granted Apr 1, 2008·5 cites·20 claims
- 3350US2010318734A1Application-transparent hybridized caching for high-performance storageMICROSOFT CORP·Filed 2009·Application pending·0 cites
- 3449US7747846B2Managed redundant enterprise basic input/output system store updateINTEL CORP·Filed 2007·Granted Jun 29, 2010·0 cites·13 claims
- 3545US2013335907A1Tray and chassis blade server architectureSHAW MARK·Filed 2012·Application pending·0 cites
- 3645US2012240116A1Performance In A Virtualization Architecture With A Processor Abstraction LayerLEUNG HIN L·Filed 2012·Application pending·0 cites
- 3744US2014173157A1Computing enclosure backplane with flexible network supportMICROSOFT CORP·Filed 2012·Application pending·0 cites
- 3844US2010036903A1Distributed load balancerMICROSOFT CORP·Filed 2008·Application pending·0 cites
- 3943US8645959B2Method and apparatus for communication between two or more processing elementsVAID KUSHAGRA·Filed 2005·Granted Feb 4, 2014·0 cites·29 claims
- 4043US8214830B2Performance in a virtualization architecture with a processor abstraction layerLEUNG HIN L·Filed 2005·Granted Jul 3, 2012·0 cites·13 claims
- 4143US2005144397A1Method and apparatus for enabling volatile shared data across caches in a coherent memory multiprocessor system to reduce coherency trafficFiled 2003·Application pending·0 cites
- 4242US2003233601A1Non-intrusive signal observation techniques usable for real-time internal signal capture for an electronic module or integrated circuitFiled 2002·Application pending·0 cites
- 4341US2013120931A1Enclosing arrangement of racks in a datacenterSANKAR SRIRAM·Filed 2011·Application pending·0 cites
- 4438US6684322B1Method and system for instruction length decodeINTEL CORP·Filed 1999·Granted Jan 27, 2004·9 cites·23 claims
- 4537US7213129B1Method and system for a two stage pipelined instruction decode and alignment using previous instruction lengthINTEL CORP·Filed 1999·Granted May 1, 2007·9 cites·16 claims
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